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Retimer riser card circuit design compatible with bidirectional transmission

A technology of two-way transmission and circuit design, applied in electrical digital data processing, instruments, etc., can solve the problems of insufficiency of Retimer adapter cards, high labor cost, and inflexible changes, so as to reduce the investment in R&D manpower and reduce The effect of capital investment and high board card reuse rate

Active Publication Date: 2020-12-11
INSPUR SUZHOU INTELLIGENT TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] 1. The current Retimer adapter card can only realize signal enhancement and transmission of high-speed PCIe signals from standard interface A (PCIe X16GF) to standard interface B (two Slimeline X8 connectors), and the change is not flexible enough. It is necessary to replace the line again, which will cost a lot of labor costs and delay the development cycle
[0009] 2. The scope of application is narrow. Under the current design scheme, it is a single-direction PCIe topology. For the business requirements of the opposite direction transmission, the current Retimer adapter card cannot meet

Method used

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  • Retimer riser card circuit design compatible with bidirectional transmission
  • Retimer riser card circuit design compatible with bidirectional transmission
  • Retimer riser card circuit design compatible with bidirectional transmission

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Embodiment

[0027] In the power supply circuit part, the Retimer chip used in this scheme is a P-family scheme. The power supply required by the Retimer chip is P1V8 and P0V9, and there are no special requirements for the power-on sequence. Therefore, this scheme is introduced by the standard interface A (PCIe X16GF). P12V electricity, and through the two VRs in the adapter card, it is converted into P1V8 and P0V9 to supply power to the Retimer chip.

[0028] In the part of the PCIe high-speed signal circuit, the PCIe high-speed signal needs to undergo clock reconstruction and data recovery of the Retimer chip to achieve the purpose of increasing the transmission distance of the PCIe high-speed signal. The Retimer chip used in this solution has two Ports (Port1 and Port2) for receiving and transmitting PCIe high-speed signals, and each Port can be connected to both the uplink and the downlink, with no specific directionality. It is required that the Retimer chip can judge the directionali...

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Abstract

The invention discloses a Retimer riser card circuit design compatible with bidirectional transmission, which comprises a Retimer chip, a power supply circuit, a PCIe (peripheral component interconnect express) high-speed signal circuit and other signal circuits required by normal operation of the Retimer chip, and is characterized in that the power supply circuit provides a power supply without special requirements on a power-on time sequence for the Retimer chip; the Retimer chip is connected with the PCIe high-speed signal circuit in a non-directional manner; other signal circuits requiredfor normal work of the Retimer chip are connected with the Retimer chip in a Co-lay mode. The board card is high in reuse rate, can meet the business requirements of different server platforms and different clients, and improves the cost performance of the board card. The board card can be suitable for different application scenes, the development requirements of new board cards can be further reduced, the investment of research and development manpower is reduced, the labor cost is saved, and the capital investment of companies is reduced.

Description

technical field [0001] The invention relates to a circuit design of a Retimer transfer card compatible with bidirectional transmission, and belongs to the technical field of board card design. Background technique [0002] PCIe (peripheral component interconnect express) is a high-performance, general-purpose high-speed serial bus standard proposed by Intel in 2001. [0003] The requirements for the line loss of PCIe link topology at different speeds in the PCIe protocol specification are as follows. Considering the loss inside the IC and the loss of the connector itself, the line loss margin reserved for the PCB trace is very, very small. This poses a great challenge to PCB routing. In the current server application environment, the link length of PCIe high-speed lines is greatly limited. Given this situation, Retimer is becoming a mainstream solution with its high performance, strong standardization and ecosystem support, comprehensive compliance procedures and open syste...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/42
CPCG06F13/4282
Inventor 杜聪聪
Owner INSPUR SUZHOU INTELLIGENT TECH CO LTD