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Semiconductor device and preparation method thereof

A technology for semiconductors and devices, applied in the field of semiconductor devices and their preparation, can solve problems such as the inability to obtain negative threshold voltages

Pending Publication Date: 2020-12-18
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The purpose of the present invention is to provide a semiconductor device and its preparation method to solve the problem that the existing semiconductor device cannot obtain a negative threshold voltage during its preparation process

Method used

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  • Semiconductor device and preparation method thereof
  • Semiconductor device and preparation method thereof
  • Semiconductor device and preparation method thereof

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Embodiment Construction

[0033] The semiconductor device and its manufacturing method proposed by the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0034] Please refer to figure 1 , which is a schematic flowchart of a method for manufacturing a semiconductor device provided by an embodiment of the present invention. Such as figure 1 Shown, the preparation method of described semiconductor device comprises:

[0035] Step S1: Provide a semiconductor substrate:

[0036] Step S2: forming a first well region of the first conductivity type in the semiconductor substrate;

[0037] Step S3: forming a fi...

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Abstract

The invention provides a semiconductor device and a preparation method thereof. The preparation method of the semiconductor device comprises the steps of forming a first well region of a first conductive type in a semiconductor substrate, forming a first threshold voltage adjustment region of a second conductive type in the first well region, forming a second well region of a second conductive type in the first well region, wherein the first threshold voltage adjustment region is located on the second well region, forming a second threshold voltage adjustment region of a first conductive typein the first well region and the second well region, wherein the second threshold voltage adjustment region is partially overlapped with the first threshold voltage adjustment region, and forming a gate structure on the second threshold voltage adjustment region. Due to the fact that the second threshold voltage adjustment region and the first well region are the same in conductive type, the voltage of the first well region can be adjusted through the second threshold voltage adjustment region, and the semiconductor device can further obtain the threshold voltage with the large negative value.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor device and a preparation method thereof. Background technique [0002] LDMOS (Laterally Diffused Metal Oxide Semiconductor) devices have many advantages, such as better thermal stability and frequency stability, higher gain, lower feedback capacitance and thermal resistance, and constant input impedance. LDMOS tubes can be divided into two categories according to the conduction mode: depletion type and enhancement type. When the gate voltage is zero, the conductive channel is in an open state, and the one with a larger drain current is called depletion type; when the gate voltage is zero , the conduction channel is closed, and the drain current is also zero, and the drain current must be turned on after a certain gate voltage is called enhanced type. Usually, LDMOS will be integrated with non-volatile memory and so on. In the existing non-vol...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L29/78H01L29/06
CPCH01L29/66681H01L29/7816H01L29/0619
Inventor 于涛
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP