Low-power-consumption chip architecture awakened by utilizing I2C address matching and awakening method

Abstract

The invention relates to the technical field of integrated circuits, in particular to a low-power-consumption chip architecture awakened by utilizing I2C address matching and an awakening method, andthe low-power-consumption chip architecture comprises a PD_SOC power supply domain for realizing main functions of a system-on-chip; a PD_RAM power supply domain formed by combining a plurality of low-power-consumption modes such as reset and power, wherein the PDRAM power supply domain is formed by combining a plurality of low-power-consumption modes such as reset and power; a PD_LPM power supplydomain used for realizing global configuration, global clock reset and power consumption management; and a PD_AON power supply domain for global configuration, low-frequency clock and global reset, awakening and power supply / power consumption management of an always on domain. An I2C slave address matching module is arranged, so that an I2C slave low-power-consumption chip is in a lowest power consumption mode, an I2C slave address matching module is driven by utilizing SCL and SDA of the I2C, when the address is matched, the I2C slave low-power-consumption chip is triggered to exit from thelow-power-consumption mode to the working mode. Without increasing system integration cost, the I2C slave low-power-consumption chip can use the lowest power consumption mode, and the defect that power consumption and system integration cost cannot be considered at the same time in traditional design is overcome.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a low-power consumption chip architecture and a wake-up method awakened by I2C address matching. Background technique [0002] As a low-power chip with an I2C slave status, when there is no transaction to be processed, in order to reduce power consumption, it needs to enter a low-power mode. At the same time, in order to be able to respond to the instructions of the I2C host at any time, there are two ways in the traditional design: 1. Do not enter the lowest power consumption mode, but enter a standby mode with medium power consumption, so as to receive instructions from the I2C host in time. Response; 2. Set a dedicated wake-up pin. When the I2C master needs to access the I2C slave low-power chip, it needs to use the dedicated wake-up pin to trigger the I2C slave low-power chip to exit from low-power mode to work. mode, and then I2C communication can be performed. ...

AI Technical Summary

Problems solved by technology

[0003] Aiming at the deficiencies of the prior art, the present invention discloses a low-power chip architecture and a wake-up method using I2C address matching wakeup, which are used to solve the needs of existing designs including I2C slaves, smart meters or portable devices, etc. In a system with ultra-low power consumption, the low-power chip as an I2C slave needs to respond to the instructions of the I2C master at any time, and cannot take into account the defects of power consumption and system integration costs.

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