Neural network tensor processor

A neural network and processor technology, applied in the field of artificial intelligence chips, can solve the problems of unfavorable computing efficiency, improvement, and not being widely used, and achieve the effect of improving computing efficiency

Pending Publication Date: 2021-02-19
厦门壹普智慧科技有限公司
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AI Technical Summary

Problems solved by technology

[0006] 3) MISD (Multiple Instruction Single Data): Multiple instructions process one data, which is not commonly used at present
However, the granularity of the calculation graph level is too coarse, and there is not much correlation between the various types. A typical neural network calculation consists of Convolution, Pooling, BN, Scale, RELU, etc., and their behaviors vary greatly. If the processor is designed according to the granularity of the calculation graph operation, this means that special

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Embodiment 1

[0046] Such as figure 1 As shown, the technical solution of this embodiment is to provide a hardware architecture of a neural network tensor processor, figure 1 shown. It mainly consists of three parts: Host Controller, Reconfiguration Controller, and Data-flow Computing Engine.

[0047] In order to improve the flexibility of system integration, the tensor processor adopts the asynchronous clock scheme between the system core and the AXI bus interface. The system uses four completely independent asynchronous clocks to realize the isolation between the tensor processor core and the external system. Among them, the AXI slave device interface uses one AXI slave device bus clock (slave clk), the AXI master device interface uses two AXI master device bus clocks (master0 clk and master1 clk), and the tensor processor core uses the core clock (coreclk).

[0048] The main function of the main controller is to provide traditional software control and status interface to the external ...

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Abstract

The invention discloses a neural network tensor processor. The neural network tensor processor comprises a main controller, a reconstruction controller and a data flow calculation engine, the main controller is used for providing a control and state interface of the neural network tensor processor for an external control unit, and providing first configuration information and a first initial signal for the reconstruction controller, the reconstruction controller receives the first configuration information and the first starting signal, obtains a reconstruction instruction of an external memory after the first starting signal is valid, and analyzes the reconstruction instruction to generate second configuration information and a second starting signal, and the data flow calculation enginereceives the second configuration information and the second initial signal, performs function configuration according to the second configuration information, acquires data and parameters of the external memory to execute operation after the second initial signal is valid, and writes a calculation result into the external memory. The tensor processor provided by the invention is suitable for carrying out centralized calculation on a neural network algorithm, and has universality and expandability.

Description

technical field [0001] The invention relates to the technical field of artificial intelligence chips, in particular to a neural network tensor processor. Background technique [0002] Processor technology is one of the major manifestations of human technological progress. However, the abstract model of a processor is quite simple: (1) the processor is composed of memory, input / output interface, control unit, and computing unit; (2) the processor performs the following operations in a loop: "fetch instruction / data, execute instruction , Write data"; (3) The behavior of the processor is completely determined by instructions and data. No matter how complex the processor is, be it CPU, GPU or DSP, the above model applies to all. This processor abstract model is the famous "von Neumann structure", the core of which is to store the program used for control as data. This computing model based on the stored program has been used until now. However, the complexity of the device st...

Claims

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Application Information

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IPC IPC(8): G06N3/063
CPCG06N3/063
Inventor 罗闳訚何日辉周志新
Owner 厦门壹普智慧科技有限公司
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