Quantum topological graph optimization method and device, terminal and storage medium

Abstract

The invention discloses a quantum topological graph optimization method and device, a terminal and a storage medium, and the method comprises the steps of obtaining a first quantum topological graph of a target quantum algorithm, and judging whether there is a cross connection line and / or a to-be-optimized node in the first quantum topological graph or not; determining an intermediate node in thefirst quantum topological graph, reserving connecting lines between the intermediate node and other graph nodes, obtaining connecting line weights of the connecting lines between the other graph nodes, and deleting the connecting lines according to the connecting line weights to obtain a second quantum topological graph which does not contain cross connecting lines; and determining an optimizationsub-graph composed of N sub-nodes which correspond to the to-be-optimized node and are communicated through connecting lines according to a preset mode, and allocating the connecting lines between the non-optimized node and the sub-nodes to obtain an optimized quantum topological graph. According to the invention, the depth of the quantum algorithm is simplified, the fidelity of the quantum algorithm is improved, and the complex quantum algorithm runs on the quantum chip.

Description

technical field [0001] The invention belongs to the field of quantum computing, in particular to a quantum topological graph optimization method, device, terminal and storage medium. Background technique [0002] With the popularization of quantum computing technology, quantum chips that implement quantum computing have become the focus of research. Compared with traditional integrated chips, quantum chips have powerful parallel computing capabilities, and the parallel computing capabilities increase exponentially with the number of bits (qubits) in quantum chips. [0003] A quantum algorithm is a method of implementing quantum computing that is simulated in a quantum circuit and needs to be run on a quantum chip; when some quantum algorithms for complex operations are compiled on a quantum chip, there will be coupling between multiple qubits (that is, two qubit logic gates) crossover, the situation where the number of couplings of several qubits to adjacent qubits is exces...

AI Technical Summary

Problems solved by technology

However, quantum chips at this stage are all two-dimensional structures, and the coupling between qubits is realized through specific coupling structures (capacitors, inductors, resonant cavities, etc.), so the two coupling structures cannot be crossed; and a quantum Coupling of a bit with too many adjacent qubits will greatly reduce the regulation of the qubit and greatly reduce the accuracy of the quantum calculation performed

Therefore, some complex quantum algorithms cannot be effectively implemented on existing two-dimensional quantum chips.

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