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Allocation schema for scalable memory area

A memory and page pointer technology, applied in the direction of memory architecture access/allocation, memory address/allocation/relocation, memory system, etc., can solve problems such as extra workload

Pending Publication Date: 2021-02-26
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, a quick way to access requested information can be based on an ordered changelog, which means extra work for each update

Method used

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  • Allocation schema for scalable memory area
  • Allocation schema for scalable memory area
  • Allocation schema for scalable memory area

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Embodiment Construction

[0029] The following detailed description refers to the accompanying drawings, which show by way of illustration and not limitation various embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice these and other embodiments. Other embodiments may be utilized and structural, logical, mechanical, and electrical changes may be made to these embodiments. The various embodiments are not necessarily mutually exclusive, as some embodiments can be combined with one or more other embodiments to form new embodiments. Accordingly, the following detailed description should not be viewed as limiting.

[0030] In various embodiments, an allocation scheme of scalable storage areas for storing L2P change logs is provided. In a changelog based firmware (FW) architecture, the changelog may contain the latest L2P values. For NAND memory systems, the changelog can be updated on write operations, wh...

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Abstract

The invention relates to an allocation schema for the scalable memory area. A variety of applications can include systems and methods that control a memory size of a changelog in a storage device, where the changelog is implemented to correlate virtual page addresses to physical addresses in one or more memory devices. The memory size can be controlled by an allocation schema for a scalable memoryarea for the changelog in the storage device. The allocation schema can include using bitmaps, lists linked to the bitmaps, and a counter to count bits asserted in the bitmaps such that the allocation of memory space in the storage device can depend on usage rather than allocating a large memory space for all possible correlations of virtual page addresses to physical addresses.

Description

technical field [0001] This application relates to memory devices. Background technique [0002] Memory devices are typically provided as internal semiconductor integrated circuits in a computer or other electronic device. There are many different types of memory, including volatile and non-volatile memory. Volatile memory requires power to maintain its data, and examples of volatile memory include random access memory (RAM), dynamic random access memory (DRAM), and synchronous dynamic random access memory (SDRAM), among others. Non-volatile memory can retain stored data when no power is supplied, and examples of non-volatile memory include flash memory, read-only memory (ROM), electrically erasable programmable ROM (EEPROM), erasable Programmable ROM (EPROM), resistive variable memory such as phase change random access memory (PCRAM), resistive random access memory (RRAM), magnetoresistive random access memory (MRAM), and three-dimensional (3D) XPoint TM memory etc. [...

Claims

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Application Information

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IPC IPC(8): G06F12/02
CPCG06F12/0246G06F3/064G06F3/0679G06F3/0659G06F3/061G06F2212/1016G06F2212/7208G06F2212/7204G06F2212/7201G06F2212/7203G06F9/5016G06F12/1009G06F3/0673G06F3/0643G06F3/0608
Inventor A·德拉莫妮卡P·帕帕C·曼加内利M·亚库洛
Owner MICRON TECH INC
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