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Circuit verification method and device, electronic equipment and storage medium

A verification method and circuit technology, applied in CAD circuit design, special data processing applications, etc., can solve the problems of low verification efficiency, waste of energy and time, and achieve the effect of avoiding energy and time and improving efficiency.

Active Publication Date: 2021-02-26
HYGON INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The design circuit to be verified has several asynchronous clocks, and several sets of such clock suites are needed, so it will consume a lot of energy and time, and the verification efficiency is low

Method used

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  • Circuit verification method and device, electronic equipment and storage medium
  • Circuit verification method and device, electronic equipment and storage medium
  • Circuit verification method and device, electronic equipment and storage medium

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Embodiment Construction

[0035] Embodiments of the present application will be described in detail below in conjunction with the accompanying drawings.

[0036] It should be clear that the described embodiments are only some of the embodiments of the present application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of this application.

[0037] The clock of a large chip is very complex, and the interaction between different clock domains is also very frequent. Because the clocks in different clock domains are independent of each other, the timing relationship in combination is very complex. Generally, designers can only consider limited combination possibilities. According to these possibilities, appropriate cross-clock domain design schemes are selected. Once there is an omission, the design scheme Whether it still works is a risk. This poses ...

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Abstract

The embodiment of the invention discloses a circuit verification method and device, electronic equipment and a storage medium, relates to the technical field of integrated circuits, and aims to improve the verification efficiency of a circuit. The circuit verification method comprises the steps of obtaining clock distribution information of a to-be-verified circuit; loading a preset clock model, and instantiating the clock model into a clock instance of the to-be-verified circuit according to the clock distribution information; and configuring the clock instance so as to verify the to-be-verified circuit by utilizing a clock signal generated by the clock instance. The method is suitable for verifying the circuit.

Description

technical field [0001] The present application relates to the technical field of integrated circuits, and in particular to a circuit verification method, device, electronic equipment and storage medium. Background technique [0002] As the complexity of integrated circuits increases, the number of clocks in a single chip increases. Some of these are synchronous clocks with a fixed relationship to each other, and many are asynchronous clocks with an indeterminate relationship to each other. Different from the directness of signal interaction between synchronous clocks, the functional design of asynchronous clocks needs to consider more complex issues. For the speed relationship between asynchronous clocks, the roles and functions of the transmitted signals, designers need to adopt different design and implementation strategies. How to create enough combinations of clock characteristics such as frequency and phase between asynchronous clocks, and verify that the functions of...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/33
CPCG06F30/33
Inventor 王芳
Owner HYGON INFORMATION TECH CO LTD
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