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SWP main interface circuit and terminal

A main interface and circuit technology, applied in the direction of logic circuit, logic circuit interface device, logic circuit connection/interface layout, etc., can solve the problems of increasing circuit power consumption, demodulation output signal contains large interference signal, etc., to reduce power consumption , to reduce the effect of interfering signals

Active Publication Date: 2021-03-05
北京紫光青藤微系统有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when the SWPIN level is reversed, PM1 and NM1 will be turned on for a while, which will cause two problems: the demodulated output signal contains a large number of interference signals; the second is to increase the power consumption of the circuit

Method used

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  • SWP main interface circuit and terminal
  • SWP main interface circuit and terminal
  • SWP main interface circuit and terminal

Examples

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Embodiment Construction

[0026] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary and are intended to explain the present invention and should not be construed as limiting the present invention.

[0027] It should be noted that, referring to figure 1 , the working principle of the SWP master interface circuit in the related art is: the SWP master interface transmits the voltage signal S1 to the SWP slave interface, and adopts the level width modulation method, the logic "1" is high level in 3 / 4 cycle, and the logic "1" is high level in 3 / 4 cycle. 0" is low for 1 / 4 cycle. The SWP slave interface transmits the current signal S2 to the SWP master interface, using the load modulation method, the logic "1" when the S1 signal i...

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Abstract

The invention provides an SWP main interface circuit and a terminal, and the circuit comprises an SWP main interface; a voltage pulse transmitting unit which is used for generating two paths of firstdigital modulation signals and second digital modulation signals with different edges according to the initial digital modulation signals, and respectively controlling the SWP main interface to send the voltage pulse modulation signals to the SWP slave interface based on the first digital modulation signals and the second digital modulation signals; and a current receiving unit which is respectively connected with the SWP main interface and the voltage pulse transmitting unit, and is used for receiving the current modulation signal transmitted by the SWP slave interface from the SWP main interface based on the current threshold value when the SWP main interface transmits the voltage pulse modulation signal. The circuit can generate two paths of first digital modulation signals and second digital modulation signals with different edges, and controls the emission of the voltage pulse modulation signals through the two paths of signals, thereby facilitating the reduction of a large numberof interference signals, and reducing the power consumption during the emission of the circuit.

Description

technical field [0001] The invention relates to the technical field of short-distance communication, in particular to a SWP main interface circuit and a terminal. Background technique [0002] Near-field payment is a mobile payment technology based on Near Field Communication (NFC) technology, which can be easily applied to embedded smart devices such as mobile phones, wristbands, and computers. At present, the main near-field payment solution is SWP -SIM card scheme, in which, the SWP (single wire protocol) interface on NFC is used as the main interface of SWP-SIM communication, and the SWP interface on UICC (Universal Integrated Circuit Card, universal integrated circuit card) is used as SWP-SIM Communication slave interface. Therefore, the design and research of a high-performance, low-cost SWP main interface circuit is of great significance. The SWP main interface is the key interface for single-wire full-duplex communication between the UICC card and the NFC front-end...

Claims

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Application Information

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IPC IPC(8): H03K19/00H03K19/003H03K19/0175
CPCH03K19/0013H03K19/00315H03K19/00361H03K19/017509
Inventor 黄金煌
Owner 北京紫光青藤微系统有限公司
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