A Clock Synchronization and Reset Synchronization System Between Multiple FPGAs

Abstract

The invention is a clock synchronization and reset synchronization system among multiple FPGAs. The present invention relates to the technical field of multi-channel FPGA drive, and the system includes multi-channel FPGA, active differential crystal oscillator, matching resistance, multi-channel PROM chip and multi-channel delay circuit; the active differential crystal oscillator is connected to multiple channels through daisy chain FPGA and matching resistors realize the common clock function. The multi-channel FPGA is connected to multiple PROM chips and multi-channel delay circuits respectively to realize the generation of two co-reset signals with time differences, and realize multi-channel FPGA reset synchronization and reset signal backup Function. The present invention can improve the stability and reliability of the commercial remote sensing satellite imaging unit, reduce the power distribution system, reduce the production cost of the imaging power supply, reduce the quality of the imaging unit, reduce the quality of the satellite, and reduce the cost of occurrence, which has great advantages for commercial remote sensing satellites meaning.

Description

technical field [0001] The invention relates to the technical field of multi-channel FPGA driving of remote sensing satellites, and relates to a multi-FPGA clock synchronization and reset synchronization system. Background technique [0002] In the field of commercial remote sensing satellites, in order to increase the imaging width, optical splicing or mechanical splicing of multiple imaging sensors is often used to increase the imaging width. In order to reduce the use of FPGA resources and improve imaging stability and reliability, one FPGA is usually used to drive one image sensor. way, when using a CCD sensor as an image sensor, due to the large number of driving signals of the CCD sensor and the high power, it will generate greater interference. Special requirements are put forward for the performance of the image acquisition circuit of the CCD sensor to eliminate the crosstalk between different channels and cause abnormal images. [0003] The most fundamental way to ...

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Problems solved by technology

[0003] The most fundamental way to eliminate signal crosstalk between multiple channels is to make each channel absolutely independent on the circuit, and eliminate signal crosstalk caused by space radiation or circuit connection. Among them, the influence of space radiation crosstalk is small, and most of them are caused by circuit connection. At present, the way to eliminate crosstalk between multiple imaging channels at home and abroad is to isolate each imaging channel on the circuit, that is, there is no signal connection or ground or power connection, so that crosstalk can be eliminated very well. , but this method has great limitations in the field of CCD imaging, because in order to reduce costs in the field of commercial remote sensing satellites, the quality and volume of satellites are relatively small, and the quality and volume of imaging units are more limited, but each CCD The power is relatively large, and the voltage level used is also large. If a power supply system is matched with each channel of CCD, it will increase the mass and volume. It is impossible for commercial remote sensing satellites to have these matching, so multi-chip The CCD imaging system will use the same power supply system, so that even if there is no signal connection between the channels, the ground and the power supply cannot be separated, which will lead to a large signal crosstalk between the channels, making the image abnormal

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