Verification module with FPGA embedded in SoPC chip

Abstract

The invention relates to a verification module for an embedded FPGA of an SoPC chip, and the module comprises an FPGA model, a bus interface model, and a configuration model, the bus interface model simulates the behaviors of dual-core CPU0 and CPU1 to complete the interconnection communication with the FPGA model, and the configuration model simulates the behaviors of CPU1 to complete the onlineconfiguration of the FPGA. The invention provides a high-level modeling method to construct the peripheral verification environment of the FPGA, and the function verification problem is better and faster solved.

Description

technical field [0001] The invention relates to the field of integrated circuit design, in particular to a verification module embedded in an FPGA in a SoPC chip. Background technique [0002] Integrate domestic FPGA on multi-core SoC chips based on domestic technology. In terms of engineering, China is currently in the exploratory stage. For multi-core SoC chips integrating FPGAs, it is necessary to design interconnection and configuration interfaces. Functional verification based on design is divided into verification based on FPGA prototype platform. And the verification of the virtual prototype platform, using domestic FPGA samples and other FPGA or chip configuration and data path verification environment for FPGA prototype verification, embedded FPGA virtual verification requires the construction of peripheral design models. Difficult virtual verification problems in embedded FPGA verification. Contents of the invention [0003] In order to solve the above-mentioned...

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Problems solved by technology

[0003] In order to solve the above-mentioned technical problems existing in the background technology, the present invention provides a verification method of SoPC chip embedded FPGA, which solves the difficult problem of virtual verification in embedded FPGA verification

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