Input/output circuit

Abstract

The invention relates to the field of integrated circuits, and provides an input / output circuit which comprises an output stage, wherein the output stage comprises a first PMOS transistor, a second PMOS transistor and a first NMOS transistor, a drain electrode of the first PMOS transistor is connected with a power supply end, a source electrode of the first PMOS transistor is connected with a source electrode of the second PMOS transistor, and grid electrodes of the first PMOS transistor and the second PMOS transistor are connected; the drain electrode of the second PMOS transistor is connected with an input / output pin; the drain electrode of the first NMOS transistor is connected with the input / output pin, and the source electrode of the first NMOS transistor is connected with a ground end; a first diode, wherein the positive electrode of the first diode is connected with the ground end, and the negative electrode is connected with the input / output pin; a second diode, wherein the positive electrode of the second diode is connected with the input / output pin; and a voltage stabilizing diode, wherein the positive electrode of the voltage stabilizing diode is connected with the ground end, and the negative electrode is connected with the negative electrode of the second diode. According to the invention, the 5V tolerant input / output circuit is realized, devices are prevented frombeing damaged by overhigh input voltage, and the influence of input signals on the power supply is avoided.

Description

technical field [0001] The present application relates to the field of integrated circuits, and more to an input / output circuit. Background technique [0002] At present, the single-chip microcomputer is usually powered by a 3.3V power supply, and sometimes the peripheral equipment connected to the single-chip microcomputer needs to be powered by a 5V power supply. tolerance pin. That is to say, this pin can withstand the 5V voltage applied from the peripheral circuit, and keep the voltage input to the MCU not exceeding 3.6V. [0003] And because there is a parasitic diode in the pull-up PMOS transistor in the output stage circuit, when the PMOS transistor is turned off, when the PAD voltage is too high, the current flows to the 3.3V power supply through the parasitic diode, which is also prone to the above problems. [0004] In order to prevent the input signal from affecting the power supply, the invention proposes a new method for designing a 5V tolerant I / O circuit. ...

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Problems solved by technology

[0003] And because there is a parasitic diode in the pull-up PMOS tube in the output stage circuit, when the PMOS tube is turned off, when the PAD voltage is too high, the current flows to the 3.3V power supply through the parasitic diode, and the above problems are also prone to occur.

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