DRAM test method and device, readable storage medium and electronic equipment

Abstract

According to the invention, the DRAM to be tested is subjected to two rounds of testing, all the storage units written with the preset testing data are subjected to row alternate access, the comparison result is obtained in the row alternate access process, and the final testing result is obtained through the comparison result of the two rounds of testing; the invention can cover a previous test blind area and detect chip defects which are difficult to find in the prior art, so that multiple storage unit faults such as bridging faults and coupling faults are stimulated, the fault coverage rateis improved, the reliability of a test result is enhanced, and the benign of a product is improved.

Description

technical field

[0001] The invention relates to the field of DRAM chip testing, in particular to a DRAM testing method, device, readable storage medium and electronic equipment. Background technique

[0002] Dynamic Random Access Memory (Dynamic Random Access Memory, DRAM) is an indispensable component of contemporary computer systems. Different platforms can have double-rate synchronous Dynamic Random Access Memory (Double Data Rate, DDR) modules for personal computers or servers. Group and low power memory (Low PowerDouble Data Rate, LPDDR) chip applied to embedded ARM architecture.

[0003] The basic storage unit of LPDDR is a cell, and computers and embedded systems store and read data by writing high or low levels in the cell.

[0004] In addition, because the current DRAM adopts the burst reading and writing method for efficient access rate, that is, the reading and writing operation is performed in a storage array with the burst length (Burst Length, BL) as the unit,...

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