Peripheral equipment fault reason positioning method, device, equipment and medium

Abstract

The embodiment of the invention relates to a peripheral fault reason positioning method, a device, equipment and a medium. The method comprises the steps: obtaining the equipment information of a target peripheral, and enabling the equipment information to comprise the domain where the target peripheral is located, a bus number, an equipment number and a function number; exporting a standard file system interface by utilizing a Linux kernel in a user state; searching a target space file of the target peripheral under the standard file system interface based on the equipment information, the target space file comprising a configuration space file and/or a base address space file; acquiring a memory base address in a user state based on the target space file; acquiring register information of a state register related to the target peripheral based on the memory base address and a preset standard; and positioning a fault reason of the target peripheral based on the register information. By the adoption of the technical scheme, dependence on a third-party library is avoided, the compatibility problem of hardware architecture is solved, and external fault reasons can be quickly positioned.

Description

technical field [0001] The present disclosure relates to the technical field of network communication, and in particular to a method, device, equipment and medium for locating the cause of a peripheral failure. Background technique [0002] As the performance of current CPUs improves year by year, traditional low-speed peripherals are increasingly unable to meet actual production needs. So parallel PCI, PCI-X, and later the PCIE serial high-speed bus standard were developed. With the continuous development of technology, the PCIE bus architecture is becoming more and more abundant, and more and more high-speed PCIE peripherals are mounted, which are also becoming more and more complex. Due to the complexity and irrationality of hardware design, various abnormal phenomena may occur in general PCIE peripherals, such as complex problems that are difficult to locate such as function, performance, and stability. To locate these complex problems, collecting various status regist...

AI Technical Summary

Problems solved by technology

However, the lspci tool can only read out the standard 256-byte space of the PCI protocol, but cannot read out the entire 4096-byte space of the PCIE extension; and the lspci tool supports the X86 platform better, and for ARM64, MIPS and other non-X86 embedded Requires custom compilation, and has dependencies on third-party libraries. The threshold for use is high and the convenience is not good.

In addition, the dedicated PCI / PCIE peripheral driver provides a dedicated debugging interface. Only specific drivers can be used for specific hardware. If additional interfaces need to be added, the driver needs to be modified and compiled. Repeated unloading and loading are very inflexible, and reloading the driver will destroy the Hardware BUG site, unable to obtain and locate hardware abnormality in time

Images