OTP device structure, manufacturing method thereof and OTP memory
A technology of device structure and manufacturing method, which is applied in the field of memory, can solve the problems of difficult storage unit size and shrinkage, and achieve the effects of improving breakdown resistance, reducing size, and reducing channel length
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[0037] As mentioned in the background art section, it is difficult for the traditional two-transistor one-time programmable embedded memory cell (2TOTP cell) to shrink continuously with the progress of the technology platform.
[0038] The main reason that the inventor finds that the above-mentioned problem occurs is:
[0039] See figure 1 , figure 1 It is a structural schematic diagram of a double-tube shared word line one-time programmable embedded memory unit in the prior art; the double-tube shared word line OTP embedded memory unit includes a P well, a plurality of N+ regions located on one surface of the P well, like figure 1 As shown in , the left N+ region and the middle N+ region and the gate above the P well between the two N+ regions form a gate; the length between the left N+ region and the middle N+ region is the selection The channel length of the through pipe; the middle N+ region, the N+ region on the right and the gate above the P well between the two N+ re...
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