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SRAM unit structure, SRAM and power-on initialization method

An initialization method and cell structure technology, applied in the semiconductor field, can solve problems such as increasing power consumption and increasing chip area, and achieve the effects of reducing power consumption, reducing chip area, and improving security

Pending Publication Date: 2021-05-14
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

[0004] Based on this, the object of the present invention is to provide a kind of SRAM cell structure, SRAM memory and power-on initialization method, to solve because the introduction of master-slave structure has increased more transistors and increased more control signals, will increase chip area, the technical issue of increasing power consumption

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  • SRAM unit structure, SRAM and power-on initialization method
  • SRAM unit structure, SRAM and power-on initialization method
  • SRAM unit structure, SRAM and power-on initialization method

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Embodiment Construction

[0023] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention.

[0024] Various schematic views of embodiments of the invention are shown in the drawings, which are not drawn to scale. Therein, certain details have been exaggerated and certain details may have been omitted for the sake of clarity. The shapes of the various regions and layers shown in the figure, as well as their relative sizes and positional relationships are only exemplary, and may deviate due to manufacturing tolerances or technical limitations in practice, and those skilled in the art will Regions / layers with different shapes, sizes, and relative positions can be additionally designed as needed.

[0025] Hereinafter, the terms "first", "second", etc. are used ...

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Abstract

The invention discloses an SRAM unit structure, an SRAM memory and a power-on initialization method, and belongs to the field of semiconductors and aims to solve the technical problems that due to introduction of a master-slave structure, more transistors and more control signals are increased, the chip area is increased, and power consumption is increased. The SRAM unit structure comprises a storage element, and the storage element comprises a first phase inverter and a second phase inverter; and after the first phase inverter and the second phase inverter are cross-coupled, two storage nodes are formed. The SRAM unit structure further comprises a power-on adjusting circuit, which is electrically connected with at least one storage node and used for enabling the two storage nodes to have different fixed power-on potentials when the SRAM unit structure is powered on.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an SRAM unit structure, an SRAM memory and a power-on initialization method. Background technique [0002] SRAM (Random-Access Memory, static random access memory) is a kind of memory with static access function, which can save the data stored in it without refreshing the circuit. When SRAM is used in a chip, when the chip system detects unauthorized access, the chip system can cut off the power supply of the SRAM to prevent attackers from stealing data. However, SRAM has the problem of information residue, and the information stored before power failure can be partially restored by aging imprint extraction. Among them, aging imprint extraction means that when a memory cell stores fixed data for a long time, two symmetrical transistors will experience different degrees of BTI (Bias Temperature Instability, bias temperature instability) aging effect, resulting in a permane...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C5/14G11C11/413
CPCG11C5/148G11C11/413
Inventor 宿晓慧苏泽鑫李博王磊张学文罗家俊韩郑生
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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