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Method for sharing spi interface bus by multiple devices

An interface bus, multi-device technology, applied in the protection of internal/peripheral computer components, instruments, electrical digital data processing, etc., can solve the problems of increased design workload, limited number of spi main interfaces, and prolonged project cycle, and achieve cost The effect of controllable, promoting industrial development and increasing quantity

Pending Publication Date: 2021-07-02
北京衍芯科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Due to the wide use and large number of spi interface devices, and the limited number of spi main interfaces of the main control chip, when the number of spi devices required by electronic information equipment exceeds a certain number, some main control chips are inevitably stretched and can only be replaced with supported ones. The main control chip with more SPI interfaces will increase the design workload and even prolong the project cycle

Method used

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  • Method for sharing spi interface bus by multiple devices
  • Method for sharing spi interface bus by multiple devices
  • Method for sharing spi interface bus by multiple devices

Examples

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Embodiment Construction

[0034] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them; based on The embodiments of the present invention and all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0035] In describing the present invention, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", " The orientation or positional relationship indicated by "outside", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying t...

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Abstract

The invention discloses a method for sharing a spi interface bus by multiple devices, clock input ports of all spi interface devices are directly connected with spi interface clock signals, each data port is directly connected with corresponding spi interface data signals, only a chip selection input port of a spi device with a control function is directly connected with a spi interface chip selection signal line, chip selection signal lines of other devices are indirectly connected with spi interface chip selection signals through a gating electronic device, and a gating path of the gating electronic device is controlled by the spi device which is directly connected with spi interface chip selection. The invention relates to the field of spi communication interface use methods, password module use, electronic device data encryption and sensitive information protection design, in particular to a method for multiple devices to share a spi interface bus.

Description

technical field [0001] The invention relates to a method for using an SPI communication interface, a use of a password module, data encryption of an electronic device, and the fields of sensitive information protection design, and specifically refers to a method for sharing an SPI interface bus with multiple devices. Background technique [0002] spi is the abbreviation of Serial Peripheral Interface. It is divided into two types: spi master and spi slave. Because it occupies relatively few signal lines, is easy to use and reliable in operation, it is widely integrated into various in a chip. Generally, most of the chips that play the role of master control in electronic information equipment are integrated with spi master interface, or both spi master interface and spi slave device interface are supported, such as central processing unit (CPU), application processor (AP), MCU, DSP Most of them are integrated with spi master interface; most of the auxiliary chips are integr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F21/72G06F13/362
CPCG06F13/362G06F21/72
Inventor 张玉禄
Owner 北京衍芯科技有限公司
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