Void free low stress fill
A technology for substrate and metal deposition, which can be used in semiconductor/solid-state device parts, coatings, gaseous chemical plating, etc., and can solve problems such as no voids and low stress
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[0017] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The present invention may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present invention. While the invention will be described in conjunction with specific embodiments, it will be understood that it is not intended to limit the invention to these implementations.
[0018] Described herein are methods of feature filling and related systems and apparatus. Examples of applications include logic and memory contact fill, DRAM buried word line fill, vertically integrated memory gate / word line fill, and 3-D integration using through-silicon vias (TSVs). In some implementations, the method can be used for tungsten feature fill. Such features may include vertical features, such as vias, and horizon...
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