Phase-locked loop circuit based on two-degree-of-freedom PID compensation

Abstract

The invention discloses a phase-locked loop circuit based on two-degree-of-freedom PID compensation. The phase-locked loop circuit comprises a Clarke conversion part, a Park conversion part, a moving average filter, a per-unit-based conversion part, a two-degree-of-freedom PID compensator and a VCO link. The output of the Clarke conversion part is the input of the Park conversion part, and a q-axis component Vq output by the Park conversion part is converted into the input of the moving average filter through the per-unit-based conversion part; the two-degree-of-freedom PID compensator is divided into a PID1 compensator and a PID2 compensator; the output of the moving average filter is connected to the forward channel PID1 compensator; the sum of the output of the PID1 compensator and the output of the feedback channel PID2 compensator is obtained, and the sum of the two outputs and an initial angular frequency is connected to the VCO link; and the output of the VCO link is fed back to the input of the Park conversion part and the input of the feedback channel PID2 compensator. Rapid phase locking of phase jump which occurs when a large number of harmonic waves and even power distribution network faults are involved is realized.

Description

technical field [0001] The invention relates to a phase-locked loop circuit based on dual-degree-of-freedom PID compensation, and belongs to the technical field of distributed energy converters. Background technique [0002] In recent years, with the continuous access of grid-connected converters, the distribution network voltage situation has become extremely complex. However, grid-connected converters mainly rely on phase-locked loops to accurately obtain grid voltage amplitude and phase information to achieve stable Operating characteristics, so when there is a fault or a large fluctuation in harmonics, it may cause an error in the phase lock. [0003] The PLL based on the double synchronous reference frame and the decoupled double synchronous reference frame PLL (DDSRF-PLL) have achieved certain results, overcoming the shortcomings of the traditional single-coordinate PLL. The phase-locking problem under harmonic conditions is solved, but the structure is too complicate...

AI Technical Summary

Problems solved by technology

[0002] In recent years, with the continuous access of grid-connected converters, the distribution network voltage situation has become extremely complex. However, grid-connected converters mainly rely on phase-locked loops to accurately obtain grid voltage amplitude and phase information to achieve stable Operating characteristics, so when there is a fault or large fluctuations in harmonics, it may cause errors in phase lock

[0003] The PLL based on the double synchronous reference frame and the decoupled double synchronous reference frame PLL (DDSRF-PLL) have achieved certain results, overcoming the shortcomings of the traditional single-coordinate PLL. Solve the phase-locking problem under harmonic conditions, but the structure is too complicated, and the dynamic performance of this type of phase-locked loop has a certain relationship with the PI parameters or low-pass filter parameters of the phase-locked loop

However, the traditional one-degree-of-freedom PI control has certain limitations, and can only better satisfy any one of the tracking and anti-disturbance characteristics.

For example, the optimal value is obtained by tuning the controller parameters according to the following characteristics. Since the one-dimensional control degree of freedom of the system has been determined and cannot be adjusted, the anti-disturbance performance of the system cannot be further optimized. Similarly, parameter tuning according to the anti-disturbance characteristics will lead to Following performance cannot be further optimized

Therefore, the above PI parameters or low-pass filters can only achieve a compromise between following and anti-disturbance performance. In complex environments, it is difficult to adjust the parameters for large disturbance suppression under the traditional tracking priority premise.

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