Linear voltage regulator circuit without overshoot voltage at output end

Abstract

The invention discloses a linear voltage regulator circuit without overshoot voltage at the output end. The positive input end of an operational amplifier OP3 is connected with a reference voltage VREF1, and the output end of the operational amplifier OP3 is connected with the G end of a transistor PMOS5; the S end of the transistor PMOS5 is connected with a power supply voltage VDD; the D end of the transistor PMOS5 is connected with a resistor R6; after the resistor R6 is connected with a resistor R7, the R7 is grounded; the negative input end of the operational amplifier OP3 is connected to a connecting line of the resistor R6 and the resistor R7; the D end of the transistor PMOS5 is connected with the positive input end of a comparator OP4; a reference voltage VREF2 is input into the negative input end of the comparator OP4, and the output end of the comparator OP4 is connected with the G end of a transistor NSMOS8; the D end of the transistor NSMOS8 and the D end of the transistor PMOS5 are connected to an output voltage Vout; and the S end of the transistor NMOS 8 is grounded. According to the invention, the comparator OP4 and a discharge MOS tube NMOS 8 are added on the basis of a typical linear voltage regulator, so that the overshoot voltage of the output end of the circuit of the linear voltage regulator can be effectively reduced on the premise of not changing the transient characteristics of the linear voltage regulator.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a linear voltage regulator circuit with no overshoot voltage at the output end. Background technique [0002] Linear regulator circuits are widely used in various chip designs and electronic system designs, which have low leakage voltage (the difference between input and output voltage). Ideally, a linear regulator circuit is capable of outputting an adjustable or fixed output voltage that is invariant over time and temperature and independent of line and load variations. [0003] Conventional linear regulator circuit as attached figure 1 As shown, it consists of operational amplifier OP, output drive transistor PMOS, and feedback resistors R1 and R2. The linear regulator circuit uses a PMOS tube as the output drive tube, which can support low-dropout applications, but the output voltage will overshoot when the power is turned on quickly or the load on the output te...

AI Technical Summary

Problems solved by technology

Higher overshoot voltage will cause irreversible electrical stress damage to the post-stage circuit of the linear regulator

Most of the existing technologies are based on adjusting the internal design of the operational amplifier OP to reduce the overshoot voltage at the output of the linear regulator. These techniques reduce the overshoot voltage at the output of the linear regulator while also reducing the transient voltage of the linear regulator. State response speed

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