Semiconductor device

A semiconductor and device technology, applied in the structural field of high-voltage semiconductor devices, can solve problems such as transistor performance degradation, achieve the effect of reducing channel resistance and improving performance

Inactive Publication Date: 2004-01-07
NEC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] However, increasing low concentrations of P -- The effective width of the type electric field relaxation layer 3 also increases the channel resistance of the transistor accordingly
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Method used

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  • Semiconductor device
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Experimental program
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Effect test

Embodiment 1

[0023] figure 1 It is a semiconductor device, mainly composed of the following parts: P + Type drain diffusion layer 1, local Si oxide layer 2, low concentration P -- Type electric field relaxation layer 3, polysilicon gate 4, P + Type source diffusion layer 5, N - Type well diffusion layer 6, P type semiconductor substrate 7, formed in low concentration P -- Moderate concentration of P in type electric field relaxation layer 3 - Type diffusion layer 8, gate oxide film 9. where low concentrations of P -- The role of the type electric field relaxation layer 3 in the semiconductor device of the present invention is the same as that in the traditional transistor: that is, the load on the P + type drain diffusion layer 1 and P + type source diffusion layer 5 voltage between the N - Type well diffused layer 6 and P -- The depletion layer extending between the type electric field relaxation layers 3 bears. The present invention is characterized in that it provides a mediu...

Embodiment 2

[0027] figure 2 It is a semiconductor device, mainly composed of the following parts: N + Type drain diffusion layer 10, local Si oxide layer 2, low concentration N -- Type electric field relaxation layer 11, gate 3, N + Type source diffusion layer 12, P type semiconductor substrate 7, formed in low concentration N -- Moderate concentration N in type electric field relaxation layer 11 - Type diffusion layer 13, gate oxide film 9. where low concentration of N -- The role of the type electric field relaxation layer 11 in the semiconductor device of the present invention is the same as that in the traditional transistor: that is, it is loaded on the N + type drain diffusion layer 10 and N + type source diffusion layer 12 by a voltage between P - type semiconductor substrate 7 and N -- The depletion layer extending between the type electric field relaxation layers 11 bears. The present invention is characterized in that it provides a medium concentration N - Type diffus...

Embodiment 3

[0031] image 3 It is a semiconductor device, mainly composed of the following parts: P + Type drain diffusion layer 1, local Si oxide layer 2, low concentration P -- Type electric field relaxation layer 3, gate 4, P + Type source diffusion layer 5, N - Type fully diffused layer 6, oxide buried layer 21, P - Type support substrate 20, formed in low concentration P -- Moderate concentration of P in type electric field relaxation layer 3 - Type diffusion layer 8, gate oxide film 9.

[0032] where low concentrations of P -- The function of the type electric field relaxation layer 3 in the semiconductor device of the present invention is the same as that in a conventional transistor. In embodiment 3, a layer of oxide buried layer 21 is covered on the P-type support substrate, and become an insulating isolation substrate, which serves as a P-type semiconductor substrate, instead of figure 1 The P-type semiconductor substrate in Embodiment 1 is shown, and its operation is t...

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PUM

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Abstract

The invention relates to a semiconductor device, including: a first conductive type semiconductor substrate; a grid; a second conductive type source and leaking diffused layer formed on the substrate at two corresponding sides of the grid; a second conductive type low concentration diffused layer, a second conductive type moderate concentration diffusion layer is further formed in the low concentration diffused layer as a relaxation layer of electric field in the semiconductor device of the invention.

Description

technical field [0001] The invention relates to a semiconductor device, in particular to a structure of a high-voltage semiconductor device. Background technique [0002] Figure 6 It is a structural cross-sectional view of a traditional high-voltage P-channel MOS field effect transistor. exist Figure 6 Among them, 7 is a P-type Si single crystal semiconductor substrate, and 6 is a low-concentration N formed on the P-type Si single crystal substrate 7. - type well diffusion layer, 1 is at low concentration N - Type well diffusion layer 6 formed on the P + type drain diffusion layer, 2 is the local oxide layer of Si, 3 is the low concentration P -- Type electric field relaxation layer, 4 is polysilicon gate, 5 is P + Type source diffusion layer, 9 is the gate oxide film. This constitutes a semiconductor device. [0003] for Figure 6 This structure, by properly adjusting the low concentration of N - Type well diffusion layer 6 and low concentration P -- The size and ...

Claims

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Application Information

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IPC IPC(8): H01L21/762H01L21/336H01L29/06H01L29/78H01L29/80
CPCH01L29/1095H01L29/7835H01L29/06
Inventor 森和久
Owner NEC CORP
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