Trench gate field effect transistor with charge balance structure and manufacturing method thereof
A field-effect transistor and charge balancing technology, which is applied in semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve the problem of large occupied area
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[0050] In order to understand the technical content of the present invention more clearly, the following examples are given in detail.
[0051] see figure 2 Shown is a flow chart of the steps of the manufacturing method of the trench gate field effect transistor with the charge balance structure of the present invention.
[0052] In one embodiment, the manufacturing method of the trench gate field effect transistor with charge balance structure includes the following steps:
[0053] (1) if image 3 As shown, phosphorus is implanted on the P-substrate to form an N-buried layer;
[0054] (2) if Figure 4 As shown, an N-epitaxial layer is grown on the N-buried layer;
[0055] (3) if Figure 5 As shown, an active region is defined above the top of the device and two isolation regions are placed within the device;
[0056] (4) if Figure 6 As shown, two N-grooves are formed from the top of the device to the N-buried layer, and the N-buried layer is drawn out as a drain, and...
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