Copper interconnection layer and Damascus process method of copper interconnection layer

Abstract

The invention provides a copper interconnection layer and a Damascus process method of the copper interconnection layer. And barrier layers are formed on the side walls and the bottoms of the through holes and the grooves for forming the copper interconnection lines, and each barrier layer comprises a metal crystal adhesion layer or a graphene layer. The metal crystal adhesion layer can be a crystal Co layer or a crystal Ru layer or a crystal Os layer. The metal crystal adhesion layer can enhance the adhesion with Cu, effectively inhibits diffusion of Cu into the dielectric layer, and is beneficial to improving the electron migration performance of Cu. The formation of the metal crystal adhesion layer can effectively reduce the total thickness of the barrier layer and the first barrier layer, and effectively reduce the resistance of the through hole. The graphene layer is an amorphous carbon / graphene composite layer. Due to the formation of the graphene layer, the Cu interconnection layer has lower resistivity, and the formation of the graphene layer can also effectively reduce the total thickness of the barrier layer or the barrier layer and the first barrier layer, so that the resistance of the through hole is effectively reduced.

Description

technical field [0001] The invention relates to the field of semiconductor devices, in particular to a copper interconnection layer and a Damascus process method for the copper interconnection layer. Background technique [0002] The resistance–capacitance (RC) delay of interconnect circuits is a major factor affecting the speed performance of logic circuits. Since the 0.13μm CMOS technology node, copper (Cu) has been used as an interconnect material due to its lower resistivity. However, Cu easily diffuses into low-k dielectrics and also reduces the Electro-migration (EM) performance of Cu. [0003] In the traditional process, Ta / TaN is usually used as the barrier layer of the Cu interconnect layer in the double damascene process to prevent the diffusion of Cu. However, as CMOS in BEOL continues to decrease, the traditional Ta / TaN liner and barrier layers used for copper interconnects in dual damascene (DD) structures are preventing Cu diffusion, reducing through-hole res...

AI Technical Summary

Problems solved by technology

However, with the continuous reduction of CMOS in BEOL, the traditional Ta / TaN liner and barrier layers for copper interconnection in dual damascene (DD) structure are effective in preventing Cu diffusion, reducing via resistance, and the interaction with Cu. Adhesion to achieve Electron Migration (EM) properties of Cu is poor

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