Power semiconductor device packaging structure and manufacturing method thereof

Abstract

The invention relates to a packaging structure of a power semiconductor device and a manufacturing method thereof. The structure includes a chip body and a heat dissipation carrier. A source pad and a gate pad are arranged on the processing surface of the chip body, and a drain layer is arranged on the back surface; The heat sink is attached to the back of the chip body and electrically coupled to the drain layer. The heat sink has integrally extended side legs, which are bent from the back through the side of the chip body to the bonding plane where the source pad and the gate pad are located. The side leg is formed as a drain pad at one end of the bonding plane; the side leg maintains a gap with the side of the chip body, so that the drain pad is movable relative to the source pad and the gate pad. The encapsulation structure provided by the invention reduces the difficulty of chip manufacturing of the power semiconductor device and reduces the production process, and improves the effect of the transistor effective area of ​​the chip.

Description

technical field [0001] The invention relates to the technical field of packaging of power semiconductor devices, in particular to a packaging structure of a power semiconductor device and a manufacturing method thereof. Background technique [0002] Existing power semiconductor devices generally adopt MOSFET (metal-oxide-semiconductor field-effect transistor) architecture, and the source pad, drain pad and gate pad of the metal part are all set on the processing surface of the chip. In use, it can be electrically connected to the circuit board. In the structure of the MOSFET chip in the early stage of semiconductor manufacturing, the source pad and gate pad are on the front side of the wafer, and the drain layer is on the back side of the wafer. In order to lead the drain layer To the same side as the source pad, it is necessary to dig a slot on the chip to connect the drain layer on the back with the drain pad contact on the front. Digging deep grooves and the corresponding...

AI Technical Summary

Problems solved by technology

The technical prejudice under the relevant patents is that the gate contact pad, source contact pad and drain contact pad are all arranged on the front side, and the drain contact pad is located on the front side. The necessary deep trench excavation and corresponding isolation will increase the difficulty of chip manufacturing and production process flow, and occupy the effective area of ​​the on-chip transistor

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