Method and device for realizing multi-level storage of storage unit

Abstract

The invention relates to a method and a device for realizing multi-level storage of a storage unit. The method comprises the following steps: dividing a resistance interval corresponding to each resistance state according to the change rate of the resistance of the storage unit along with an electric pulse; counting an electric pulse range corresponding to each resistance interval, and determining an electric pulse range set when multi-level storage performs each resistance state operation; and performing pulse operation on the storage unit according to the resistance interval and the electric pulse range, and determining whether the resistance value of the phase change memory reaches a target state or not through read operation after each pulse operation so as to control the pulse operation to stop or continue. According to the invention, the success rate of multi-bit multi-level storage can be improved, the power consumption is reduced, and the efficiency is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a method and device for realizing multi-level storage of storage units. Background technique [0002] Due to its excellent scalability, low read and write delay, large capacity potential, low power consumption and other advantages, phase change memory is considered to be the next generation of new non-volatile memory. Phase change memory has a good performance with standard CMOS manufacturing process. Compatibility, with the continuous development of phase change memory, there is a tendency to replace traditional memory. [0003] In recent years, due to the rapid development of the Internet of Things, cloud services, big data, and artificial intelligence, the demand for high-density storage is higher than ever. Multi-level memory technology (MLC), by storing more than one bit of data in each memory cell, can effectively further increase the storage density of the pha...

AI Technical Summary

Problems solved by technology

However, as the number of multi-level storage bits increases, the resistance interval of each state inevitably decreases accordingly.

Although the method of verification after operation can ensure that the unit is accurately in the target resistance range after operation, as the target range becomes smaller, whether it is to use the method of slowly operating from a low-resistance crystalline state to a high-resistance amorphous state, or From high-resistance operation to low-resistance multi-level storage, whether it is the method of controlling the current amplitude or the current pulse width, it is easy to skip this interval when the resistance changes quickly, resulting in operation failure.

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