Wafer test system and method for TOF chip

Abstract

The invention relates to a TOF chip wafer test system and method. The system comprises a probe card, a probe station, a tested TOF chip wafer, a central control unit and a test head, wherein the probe card is provided with a plurality of contacts, and the contacts are respectively connected with different positions on the tested TOF chip wafer; board cards with different functions are respectively inserted into the clamping grooves in the testing head; the test head is used for performing a function test corresponding to the board card on the tested TOF chip wafer corresponding to each contact, and obtaining test data; and the central control unit is used for controlling the test head to work, receiving the test data transmitted from the test head, analyzing and processing the test data to obtain a test result, and transmitting the test result to the upper computer. The board cards with different functions are respectively inserted into the card slots on the test head and can be plugged according to test requirements, and multiple functions can be simultaneously tested through the same test head, so test efficiency is improved; moreover, the system reduces the equipment cost, and reduces the occupied field area of the test equipment.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a TOF chip wafer testing system and method. Background technique [0002] Wafer testing is to test each die on the wafer or chip, install probes on the test head, make contact with the contacts on the die, and test its electrical characteristics. TOF (Time of Flight) technology emits an infrared light source to the object under test. After the light wave is reflected by the object, it is collected by the sensor. The system calculates the distance between the object under test and the camera by calculating the pulse difference or time difference of the received light wave. Since TOF technology is a relatively new technology, the design of TOF chips and modules is also in its infancy. Wafer testing of TOF chips is usually carried out using a CIS chip test system based on a two-dimensional image sensor chip. It is also possible to independently develop a high-speed image acq...

AI Technical Summary

Problems solved by technology

[0003] However, the traditional wafer testing method has problems such as large functional redundancy, high cost, poor integration, complex software and hardware structure, difficult deployment, and non-scalability.

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