Method for expanding chip selection number and enhancing read-write response time flexibility of SPI (Serial Peripheral Interface)

Abstract

The invention discloses a method for expanding the chip selection number and enhancing read-write response time flexibility of an SPI (Serial Peripheral Interface). The method includes a master device, an SPI controller, a control word processing module and a slave device. The system adopts an SPI protocol for communication. In order to realize chip selection expansion, the control word is expanded, and N Byte chip selection bytes are added in front of the original control word. After receiving the control instruction of the MOSI port, the control word processing module decodes the chip selection information in the control instruction and pulls down the corresponding chip selection port. In order to increase the response time of the slave device, when the SPI controller sends a read instruction, invalid control bytes are added behind the address bytes. The slave device sends the data stream to the master device in the next clock period of the invalid control bytes. By adopting the method provided by the invention, the chip selection number can be expanded to 256 * N, the response time of the slave equipment is increased, and the stability and flexibility of SPI communication are improved.

Description

technical field

[0001] The invention belongs to the field of SPI communication, in particular to a method for expanding the number of SPI chip selections and enhancing the flexibility of read and write response time. Background technique

[0002] SPI (Serial Peripheral Interface, serial peripheral interface) is a high-speed full-duplex communication bus. It only occupies four wires on the chip pins, thus saving the chip pins and saving space for the layout of the printed circuit board. It is because of this easy-to-use nature that more and more chips today integrate this communication protocol.

[0003] SPI works in a master-slave mode, which usually has a master device and one or more slave devices. SPI does not have a plaintext standard, but a de facto standard. The implementation of communication operations is only a general abstract description. Chip manufacturers and driver developers communicate implementation details through data sheets and application notes. [00...

Examples

no. 1 example

[0072] For read operations, the following steps are included:

[0073] 1. The SPI controller in the master device sends the control signal to the Din port of the control word processing module via the MOSI port. The chip select port occupied by the existing SPI controller can be simplified as an enable signal port of a control word processing module. If the master device is connected to 8 slave devices, then after applying this scheme, the master device chip occupied by the system The optional port is reduced from 8 to 1, which greatly saves the pins of the chip.

[0074] 2. If the number of slave devices is less than 256, the chip select byte length can be set to 1Byte. Taking the slave device SPI flash chip M25P64 as an example, the format of the control word containing chip selection information is as follows: figure 2 . The control signal includes 1Byte chip selection byte, 1Byte mode selection byte, 3Byte address byte and 1Byte invalid control byte.

[0075] 3. ima...

technical field

[0001] The invention belongs to the field of SPI communication, in particular to a method for expanding the number of SPI chip selections and enhancing the flexibility of read and write response time. Background technique

[0002] SPI (Serial Peripheral Interface, serial peripheral interface) is a high-speed full-duplex communication bus. It only occupies four wires on the chip pins, thus saving the chip pins and saving space for the layout of the printed circuit board. It is because of this easy-to-use nature that more and more chips today integrate this communication protocol.

[0003] SPI works in a master-slave mode, which usually has a master device and one or more slave devices. SPI does not have a plaintext standard, but a de facto standard. The implementation of communication operations is only a general abstract description. Chip manufacturers and driver developers communicate implementation details through data sheets and application notes. [00...

Examples

no. 1 example

[0072] For read operations, the following steps are included:

[0073] 1. The SPI controller in the master device sends the control signal to the Din port of the control word processing module via the MOSI port. The chip select port occupied by the existing SPI controller can be simplified as an enable signal port of a control word processing module. If the master device is connected to 8 slave devices, then after applying this scheme, the master device chip occupied by the system The optional port is reduced from 8 to 1, which greatly saves the pins of the chip.

[0074] 2. If the number of slave devices is less than 256, the chip select byte length can be set to 1Byte. Taking the slave device SPI flash chip M25P64 as an example, the format of the control word containing chip selection information is as follows: figure 2 . The control signal includes 1Byte chip selection byte, 1Byte mode selection byte, 3Byte address byte and 1Byte invalid control byte.

[0075] 3. ima...

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