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Modularized semi-customized FPGA chip design method completed by means of automatic tool

A technology for chip design and automatic tools, applied in computer-aided design, calculation, special data processing applications, etc., to achieve the effects of improving development efficiency, optimizing performance, and shortening design time

Inactive Publication Date: 2021-12-07
北京中科胜芯科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the design and development of custom FPGA chips is a complex process that requires personnel with strong expertise and spends a lot of time on manual layout and routing

Method used

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  • Modularized semi-customized FPGA chip design method completed by means of automatic tool

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Experimental program
Comparison scheme
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Embodiment 1

[0021] Such as figure 1 As shown, a modular semi-custom FPGA chip design method completed by automatic tools, the following steps are performed:

[0022] 1) Complete the description file of the chip architecture; the description file needs to include process parameters, resource block distribution, timing constraint information and other overall architecture information to be customized;

[0023] 2) Analyze the architecture file to generate a formatted integrated circuit netlist and timing constraint file;

[0024] 3) Resource block library file call;

[0025] 4) Add custom units;

[0026] 5) Comprehensive layout and wiring;

[0027] 6) Generate layout.

[0028] The resource blocks include:

[0029] Configurable input and output unit block: The configurable input and output unit block is the interface part between the chip and the external circuit, and completes the driving and matching of input / output signals under different electrical characteristics.

[0030] Configur...

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Abstract

The invention relates to a modular semi-customized FPGA chip design method completed by an automatic tool, and belongs to the technical field of chip design. The method comprises the following steps: 1) completing a description file of a chip architecture; the description file needs to comprise process parameters, resource block distribution, time sequence constraint information and other to-be-customized overall architecture information; 2) analyzing the architecture file to generate a formatted integrated circuit netlist and a time sequence constraint file; 3) calling a resource block library file; 4) adding a customization unit; 5) performing comprehensive layout wiring; and 6) generating a board pattern. According to the method, on the basis of the expandability of the internal resources of the FPGA, designers can freely expand or cut the internal resources of the FPGA according to a specific application scene, the FPGA chip is rapidly customized, the chip design time is shortened, and the optimal area, power consumption and performance of a resource block are achieved while the development efficiency is improved.

Description

technical field [0001] The invention relates to a modular semi-custom FPGA chip design method completed by an automatic tool, belonging to the technical field of chip design. Background technique [0002] The field programmable gate array (FPGA) chip is mainly composed of programmable input and output units, configurable logic unit blocks, clock management modules, embedded RAM blocks, wiring resources, and embedded dedicated hard cores and other resources. For different application scenarios, the types and quantities of internal resources of the FPGA chip will be different. [0003] Driven by the demand for large-scale data processing applications, current FPGA chips play an increasingly important role in computing systems. In order to address the unprecedented processing power challenges faced by specific domain applications, FPGA chips can be domain-customized. However, the design and development of custom FPGA chips is a complex process that requires personnel with str...

Claims

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Application Information

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IPC IPC(8): G06F30/343G06F30/347
CPCG06F30/343G06F30/347
Inventor 赵飞舒毅杨海钢贾一平秋小强
Owner 北京中科胜芯科技有限公司