Semiconductor structure and forming method thereof

Abstract

A forming method of a semiconductor structure includes forming an opening through a dielectric material layer to physically expose an upper surface of a conductive material portion in or on a substrate; forming a metal nitride liner layer on sidewalls of the opening and on an upper surface of the conductive material portion; the metal adhesion layer comprising an alloy of at least one transition metal of copper and non-copper, and being formed on the inner side wall of the metal nitride layer; a copper fill material portion may be formed on an inner sidewall of the metal adhesion layer; the metal adhesion layer being thermally stable and remains void-free during a subsequent thermal process, and the thermal process may include reflowing the copper fill material portion; after the reflow process, additional copper fill material portions may be deposited as appropriate.

Description

technical field [0001] Embodiments of the present invention relate to semiconductor devices, and more particularly to metal interconnect structures with thermally stable copper alloy adhesion layers and methods of forming the same. Background technique [0002] Filling copper in tight spaces is challenging because the deposited copper often does not fully cover the underlying surface. As a result, voids are prone to form after copper is deposited. Specifically, when copper is deposited to form a fine-pitch copper interconnect structure, copper tends to accumulate on the adhesive layer due to the low mobility of copper on the adhesive layer. In addition, the thermal stability of the adhesive layer is insufficient, and voids will be formed in the adhesive layer during the subsequent copper reflow process. Therefore, the copper filling layer in the fine-pitch copper interconnection structure tends to generate voids and cause electrical open circuits in the copper interconnect...

AI Technical Summary

Problems solved by technology

In addition, the thermal stability of the adhesive layer is insufficient, and voids will be formed in the adhesive layer during the subsequent copper reflow process

Therefore, the copper filling layer in the fine-pitch copper interconnection structure is prone to voids and causes electrical open circuits in the copper interconnection structure

These defects negatively impact chip yields in advanced semiconductor devices

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