Cache-based cache data processing method, storage medium and chip

Abstract

The invention relates to the technical field of data caching, and discloses a cache-based cache data processing method, a storage medium and a chip. The cache-based cache data processing method comprises the following steps: traversing a first address query table of a first cache queue; according to the memory block initial address of each cache line, determining the cache line meeting a memory address continuity condition as a candidate cache line; and processing the cache data of each candidate cache line according to the cache length of each candidate cache line and a preset length threshold. According to the method, the cache data of each candidate cache line can be processed by combining the cache length of each candidate cache line according to the continuity of the initial address of the memory block, so that the cache data of a plurality of cache lines with continuous addresses are prevented from being easily eliminated when the cache data are eliminated, and when the next access is carried out, a fact that the cache data of the plurality of cache lines which are brushed off and have continuous addresses are loaded by spending more loading time is prevented.

Description

technical field [0001] The invention relates to the technical field of data cache, in particular to a cache-based cache data processing method, storage medium and chip. Background technique [0002] Cache memory (cache) technology is one of the core technologies in modern processor design, which effectively solves the matching problem between processing speed and memory speed. Cache is used to cache cached data (cache data) in memory. When the main device accesses the memory, it can be transferred to the cache for access, and the cached data is fetched from the cache. When the cache storage space is full, the cached data loaded in the cache needs to be eliminated. [0003] The prior art can provide various cache elimination algorithms to eliminate cached data, but the existing cache elimination algorithms all determine the cache status of a single cache line in isolation, and determine whether to eliminate the single cache line according to the cache status of a single cac...

AI Technical Summary

Problems solved by technology

[0004] However, in the application scenario where the main device accesses the memory continuously, the existing cache elimination algorithm is easy to eliminate the cached data whose starting address of the memory block is continuous and corresponds to one or more memories. However, the cache controller will When the cached data with continuous block start addresses and corresponding to multiple memories is loaded from the memory to the cache, it takes a lot of loading time

When the above-mentioned multiple cached data are eliminated, and the master device needs to use the above-mentioned multiple cached data next time, the cache controller needs more time to load it from the memory into the cache, thereby reducing the data access efficiency

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