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A heterojunction cell with improved photoelectric conversion efficiency

A technology of photoelectric conversion efficiency and heterojunction cells, applied in photovoltaic power generation, circuits, electrical components, etc., can solve the problem that the photogenerated current of HJT cells cannot be further improved, and achieve high conversion efficiency

Active Publication Date: 2022-06-21
ZHEJIANG AIKO SOLAR ENERGY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] The front of the existing HJT battery structure generally uses intrinsic amorphous silicon superimposed on n-type amorphous silicon. Usually intrinsic amorphous silicon has a good passivation effect, while n-type amorphous silicon usually serves more as an electronic selection For the effect of transmission, p-type amorphous silicon usually plays a role of hole selective transmission, but due to the large parasitic absorption of the two, the photo-generated current of HJT cells cannot be further improved.

Method used

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  • A heterojunction cell with improved photoelectric conversion efficiency
  • A heterojunction cell with improved photoelectric conversion efficiency
  • A heterojunction cell with improved photoelectric conversion efficiency

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0035] First, the textured n-type silicon substrate 1 is selected to prepare the textured surface, that is, a pyramid-shaped light trapping structure is constructed on the surface of the n-type silicon substrate 1;

[0036] Next, deposition of intrinsic amorphous silicon 2 on the backside of the n-type silicon substrate 1;

[0037] Secondly, the deposition of doped amorphous silicon is performed on the intrinsic amorphous silicon 2 on the back side;

[0038] Then, deposition of intrinsic amorphous silicon 2 is performed on the front surface of the n-type silicon substrate 1;

[0039] Then, a hard mask method is used to deposit a mixed layer 3 on the front side of the battery, and the thickness of the mixed layer 3 is 9 nm; wherein, when the doped amorphous silicon in S3 is selected as the first n-type doped amorphous In the case of silicon 6, the mixed layer 3 is a first p-type doped amorphous silicon 30 and film layer 31; when the doped amorphous silicon in S3 is selected ...

Embodiment 2

[0043] First, the textured n-type silicon substrate 1 is selected to prepare the textured surface, that is, a pyramid-shaped light trapping structure is constructed on the surface of the n-type silicon substrate 1;

[0044] Next, deposition of intrinsic amorphous silicon 2 on the backside of the n-type silicon substrate 1;

[0045] Secondly, the deposition of doped amorphous silicon is performed on the intrinsic amorphous silicon 2 on the back side;

[0046] Then, deposition of intrinsic amorphous silicon 2 is performed on the front surface of the n-type silicon substrate 1;

[0047] Then, a hard mask method is used to deposit a mixed layer 3 on the front side of the battery, and the thickness of the mixed layer 3 is 5 nm; wherein, when the doped amorphous silicon in S3 is selected as the first n-type doped amorphous In the case of silicon 6, the mixed layer 3 is a first p-type doped amorphous silicon 30 and film layer 31; when the doped amorphous silicon in S3 is selected ...

Embodiment 3

[0051] First, the textured n-type silicon substrate 1 is selected to prepare the textured surface, that is, a pyramid-shaped light trapping structure is constructed on the surface of the n-type silicon substrate 1;

[0052] Next, deposition of intrinsic amorphous silicon 2 on the backside of the n-type silicon substrate 1;

[0053] Secondly, the deposition of doped amorphous silicon is performed on the intrinsic amorphous silicon 2 on the back side;

[0054] Then, deposition of intrinsic amorphous silicon 2 is performed on the front surface of the n-type silicon substrate 1;

[0055] Then, a hard mask method is used to deposit a mixed layer 3 on the front side of the battery, and the thickness of the mixed layer 3 is 1 nm; wherein, when the doped amorphous silicon in S3 is selected as the first n-type doped amorphous In the case of silicon 6, the mixed layer 3 is a first p-type doped amorphous silicon 30 and film layer 31; when the doped amorphous silicon in S3 is selected ...

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Abstract

A heterojunction cell for improving photoelectric conversion efficiency, belonging to the technical field of solar cells, comprising an n-type silicon substrate, and intrinsic amorphous silicon deposited on the front and back of the n-type silicon substrate; the front of the n-type silicon substrate A front electrode, a first TCO layer, a mixed layer, and intrinsic amorphous silicon are sequentially arranged from top to bottom, and a back electrode, a second TCO layer, a doped Amorphous silicon and intrinsic amorphous silicon; through this mixed-phase film design, it can break the upper limit of the photo-generated current of the HJT battery on the premise of ensuring that other parameters of the HJT battery remain at the same level, so that it can achieve higher conversion efficiency.

Description

technical field [0001] The invention belongs to the technical field of solar cell processing, and particularly relates to a heterojunction cell with improved photoelectric conversion efficiency. Background technique [0002] The front side of the existing HJT cell structure generally uses intrinsic amorphous silicon superimposed on n-type amorphous silicon. Usually, intrinsic amorphous silicon has a good passivation effect, while n-type amorphous silicon usually acts more as an electronic selection. For the effect of transmission, p-type amorphous silicon usually plays more of a hole selective transport effect, but due to the large parasitic absorption of the two themselves, the photo-generated current of HJT cells can never be further improved. SUMMARY OF THE INVENTION [0003] The purpose of the present invention is to provide a heterojunction cell with improved photoelectric conversion efficiency, so as to solve the above-mentioned problems in the background art. [00...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L31/0352H01L31/0376H01L31/0747
CPCH01L31/0747H01L31/03762H01L31/03529Y02E10/548
Inventor 吴智涵王永谦林纲正陈刚
Owner ZHEJIANG AIKO SOLAR ENERGY TECH CO LTD