Lightweight on-chip learning method and system based on spiking neural network, and processor

A technology of spiking neural network and learning method, applied in the field of lightweight on-chip learning method, system and processor, can solve the problem of low recognition rate of shallow spiking network, and achieve guaranteed performance, improved recognition effect, and increased computing rate. Effect

Pending Publication Date: 2022-02-25
CHONGQING UNIV
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Problems solved by technology

[0003] One of the purposes of the present invention is to provide a light-weight on-chip learning method based on spiking neural networks, which solves the problem of low recognition rate of shall

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  • Lightweight on-chip learning method and system based on spiking neural network, and processor
  • Lightweight on-chip learning method and system based on spiking neural network, and processor
  • Lightweight on-chip learning method and system based on spiking neural network, and processor

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Embodiment Construction

[0041] The light-weight on-chip learning method based on the pulse neural network in the embodiment of the present invention is applied to picture recognition;

[0042] First, the input image is rate-encoded, and the static frame image is converted into a pulse form. Each pixel is regarded as a pre-synaptic neuron. Compare,.

[0043] On the other hand, the output layer neurons of the spiking neural network use Leaky Integrate-and-Fire (LIF) neurons, that is, post-synaptic neurons, and pre-synaptic neurons and post-synaptic neurons are fully connected The pulses emitted by presynaptic neurons are called presynaptic pulses, and the pulses emitted by postsynaptic neurons are called postsynaptic pulses.

[0044] The network topology used in this embodiment is as follows figure 1 As shown, the input nodes (Input nodes) in the figure correspond to each pixel, and the output layer (Output layer) is a 16×16 two-dimensional network topology. As shown in the figure, the Input nodes an...

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Abstract

The invention belongs to the technical field of microprocessors, and particularly discloses a lightweight on-chip learning method based on a spiking neural network. The method comprises the steps: carrying out the rate coding of an input image, converting a static frame image into a pulse form, taking each pixel point as a presynaptic neuron, and enabling an output layer of the spiking neural network to be composed of LIF neuron, wherein each neuron is a post-synaptic neuron, the pre-synaptic neuron and the post-synaptic neuron are connected in a full connection mode, and in the training of the spiking neural network, the weight of each synaptic is updated according to an STDP weight updating learning rule; when the post-synaptic neurons emit pulses, the neurons are winning neurons, the winning neurons are taken as centers, membrane potentials of other post-synaptic neurons are inhibited according to the chessboard distances of the post-synaptic neurons, and finally the self-organizing pulse neural network is obtained. The problem that the shallow pulse network recognition rate is low is solved.

Description

technical field [0001] The invention belongs to the technical field of microprocessors, and in particular relates to a light-weight on-chip learning method, system and processor based on a pulse neural network. Background technique [0002] The rapid development of traditional deep neural network has made it widely used in various fields of society, including face recognition, smart home, smart medical care, etc. Dealing with problems such as slow speed and low energy efficiency. Although it has the support of a GPU or a dedicated accelerator chip, it cannot break through the bottleneck of energy efficiency, and it is difficult to realize on-chip learning, and the cost also increases accordingly. On the other hand, the brain-like mechanism that simulates the pulse processing of the human brain, that is, the pulse neural network, encodes information through pulses and performs transmission processing. The problem of low recognition rate of shallow spiking network, while dee...

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Application Information

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IPC IPC(8): G06N3/04G06N3/063G06N3/08G06F15/78
CPCG06N3/08G06N3/063G06F15/7807G06N3/045
Inventor 王海冰石匆田敏王腾霄何俊贤何祯
Owner CHONGQING UNIV
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