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Transmission circuit and transmission system

A transmission circuit, serial transmission technology, applied in the direction of logic circuit connection/interface layout, electrical digital data processing, instruments, etc., can solve problems such as difficulty in providing design

Pending Publication Date: 2022-04-12
REALTEK SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, whether it is Simplified GMI or GMI, there is a fixed number of interfaces, so it is still difficult to provide a more flexible design when the transmission speed required by the application is low

Method used

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  • Transmission circuit and transmission system
  • Transmission circuit and transmission system
  • Transmission circuit and transmission system

Examples

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Embodiment Construction

[0018] figure 1 is a schematic diagram of a transmission circuit 100 according to an embodiment of the present invention. exist figure 1 Among them, the transmission circuit 100 can be coupled to another transmission circuit TC1, and can perform data transmission with the transmission circuit TC1. In some embodiments, the transmission circuit 100 may be, for example, a transmission circuit of a physical layer, and the transmission circuit TC1 may be a transmission circuit of a data link layer. In the prior art, if a reduced gigabit media independent interface (Reduced Gigabit Media Independent Interface, RGMII) is used for data transmission between the transmission circuit of the physical layer and the transmission circuit of the data link layer, the two transmission circuits must Each includes four uplink data transmission interfaces and four downlink data transmission interfaces, so the design is less flexible. In contrast, the transmission circuit 100 can transmit uplink...

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PUM

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Abstract

The invention relates to a transmission circuit and a transmission system. The transmission circuit comprises a data input interface, a serial-to-parallel converter, an interface decoder, a parallel-to-serial converter and a processing unit. The serial-to-parallel converter is coupled with the data input interface. The serial-to-parallel converter converts a plurality of data signals received from the first data input interface into a parallel signal group. The interface decoder is coupled with the serial-to-parallel converter. The interface decoder decodes the parallel signal set to generate a decoded data signal set transmitted in parallel. The parallel-to-serial converter is coupled with the interface decoder. The parallel-to-serial converter converts the decoded data signal group into a plurality of input data signals which are transmitted in series. The processing unit is coupled to the parallel-to-serial converter, and receives and processes a plurality of input data signals.

Description

technical field [0001] The invention relates to a transmission circuit, in particular to a transmission circuit capable of reducing the number of interfaces. Background technique [0002] In the prior art, Gigabit Media Independent Interface (Gigabit Media Independent Interface, GMII) or Reduced Gigabit Media Independent Interface (Reduced Gigabit Media Independent Interface, RGMII) for data transmission. The gigabit media independent interface includes 2 clock pulse interfaces, 8 data input interfaces, 8 data output interfaces, 2 output control signal interfaces and 2 input control signal interfaces. In each clock cycle, each data interface of the GMI can receive or output a one-bit signal. Due to the large number of interfaces required by the gigabit media independent interface, the wiring inside the chip is more complicated, which increases the overall area requirement, and too many interfaces also make the design of the external circuit more complicated and inflexible....

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/0175G06F13/38G06F13/42
Inventor 陈彦贵黄亮维
Owner REALTEK SEMICON CORP