Unlock instant, AI-driven research and patent intelligence for your innovation.

Amplifier based on power adaptive bias adjustment technology

An adaptive bias and amplifier technology, applied to power amplifiers, improved amplifiers to reduce nonlinear distortion, etc., can solve problems such as difficult on-chip integration, low amplifier efficiency, and complex circuit structure

Pending Publication Date: 2022-04-15
CHENGDU GANIDE TECH
View PDF0 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] (1) Power back-off technology, that is, select a transistor with higher power as a low-power transistor, so that the amplifier works in the back-off linear amplification region to obtain a high linearity index, but in order to achieve high linearity within a wider dynamic range, For example, the use of a large transistor size greatly sacrifices the DC power consumption of the amplifier, and the efficiency of the amplifier is very low
[0005] (2) Envelope tracking technology, using detection circuit, bias adjustment technology, etc. to track the output power of the amplifier, and automatically adjust the bias circuit of the amplifier according to the dynamic range of the output power, thereby avoiding the high-power transistor in the power back-off technology The disadvantage of "one size fits all", this method has a better improvement effect, but the circuit structure is extremely complex, and it is difficult to integrate on-chip
[0006] (2) Intermodulation component cancellation technology, using the two amplifiers of the main road and the auxiliary road to work in class AB and class C modes, so that class C of the auxiliary road produces positive third-order intermodulation components, offsetting the negative third-order of the main road class AB Intermodulation components, thereby improving the IP3 index and P1dB index of the amplifier, but this way of direct synthesis and cancellation of the main and auxiliary amplifiers, there is a difference between the fundamental wave and harmonic phase of the signal, and the best cancellation effect cannot be achieved

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Amplifier based on power adaptive bias adjustment technology
  • Amplifier based on power adaptive bias adjustment technology

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0031] The specific embodiments of the present invention are described below so that those skilled in the art can understand the present invention, but it should be clear that the present invention is not limited to the scope of the specific embodiments. For those of ordinary skill in the art, as long as various changes Within the spirit and scope of the present invention defined and determined by the appended claims, these changes are obvious, and all inventions and creations using the concept of the present invention are included in the protection list.

[0032] An embodiment of the present invention provides an amplifier based on power adaptive bias adjustment technology, such as figure 1 As shown, it includes input ESD protection and DC blocking matching network, first power adaptive bias adjustment amplification network, second power adaptive bias adjustment amplification network, output phase synthesis matching network and dual differential mode filter network;

[0033] ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses an amplifier based on a power self-adaptive bias adjustment technology, which comprises an input ESD (Electro-Static Discharge) protection and blocking matching network, a first power self-adaptive bias adjustment amplification network, a second power self-adaptive bias adjustment amplification network, a double-path differential mode filter network and an output phase synthesis matching network, according to the improved stacked Darlington amplification structure based on the power self-adaptive bias adjustment technology, a high high-frequency gain index is obtained, a high-linearity index in a wide dynamic range can be achieved by combining a harmonic parasitic component phase compensation technology, and meanwhile a differential-mode filtering network between two amplification networks is utilized to achieve high-frequency gain amplification. Redundant differential mode signals of the improved stacked Darlington amplification structure are filtered out, and the stability of the amplifier is improved.

Description

technical field [0001] The invention belongs to the technical fields of 5G communication and integrated circuits, and in particular relates to the design of an amplifier based on power adaptive bias adjustment technology. Background technique [0002] With the development of software radio, broadband instrumentation, 5G communication and other technologies, the system bandwidth rate index has been continuously improved, which has led to higher requirements for the linearity index of the broadband amplifier in the market. Especially in order to deal with high-rate peak-to-average ratio signals, the amplifier is required to have good linearity indicators in a wide dynamic range. [0003] In order to improve the linearization index in the wide dynamic range of the drive amplifier chip, the following technical means can be used when designing the chip, but these means have some shortcomings: [0004] (1) Power back-off technology, that is, select a transistor with higher power ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H03F3/21H03F1/32
Inventor 王测天邬海峰童伟叶珍廖学介刘莹胡柳林石君
Owner CHENGDU GANIDE TECH