Microprocessor architecture and microprocessor fault detection method

A technology of microprocessor and detection cycle, which is applied in electrical digital data processing, error detection/correction, and redundancy in hardware for error detection of data. It can solve problems such as waste of resources and achieve the effect of improving reliability.

Pending Publication Date: 2022-04-29
INST OF COMPUTING TECH CHINESE ACAD OF SCI
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  • Description
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Problems solved by technology

In ordinary core-level lockstep, slave cores can only run in lockstep mode

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  • Microprocessor architecture and microprocessor fault detection method
  • Microprocessor architecture and microprocessor fault detection method
  • Microprocessor architecture and microprocessor fault detection method

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Embodiment Construction

[0025] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation methods described here are only used to explain the present invention, and are not intended to limit the present invention.

[0026] According to the importance of the task and the harm caused to the system when the task fails, the critical level of the task can be classified. If the task fails, it may not affect the safety of the vehicle and the person. In a mixed-criticality system, tasks of different criticality levels are running at the same time. When a low-criticality task is running, when a failure is detected, it is not feasible to restart the system to solve the problem, which will affect the execution of high-level tasks. Therefore, it is necessary to use the checkpoint rollback technology to recov...

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Abstract

The invention provides a microprocessor architecture which comprises a master core, a slave core, a bus and a comparator, the master core and the comparator are respectively in communication connection with the bus, and the slave core is in communication connection with the comparator; when the microprocessor is in a lockstep mode, the comparator blocks an access request of the slave core to the bus, the master core and the slave core both execute a master core task, and the comparator compares master core operation data of the master core with slave core operation data of the slave core so as to perform fault detection on the execution state of the master core task. The microprocessor fault detection method comprises the steps that the operation mode of the microprocessor is set according to the task requirement, and the operation mode comprises the lockstep mode and the non-lockstep mode; and if the microprocessor is in a lock step mode, the master core and the slave core both execute the master core task, and the master core operation data of the master core is compared with the slave core operation data of the slave core to perform fault detection on the execution state of the master core task.

Description

technical field [0001] The invention belongs to the technical field of microprocessors, and in particular relates to a microprocessor which adopts light lock-step technology to improve reliability. Background technique [0002] Microprocessors are widely used in various fields, and life-critical fields such as automobiles, medical treatment, and aviation have put forward higher reliability requirements for microprocessor design. With the development of semiconductor technology, the size of transistors continues to shrink, which makes the device more sensitive to the influence of radiation, electromagnetic interference, voltage disturbance and other factors, resulting in frequent transient faults, which may lead to circuit failure, and eventually cause huge life and death. property loss. Therefore, it is necessary to use a highly reliable design to detect the faults generated during the operation of the microprocessor, and further use fault recovery technology to ensure the ...

Claims

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Application Information

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IPC IPC(8): G06F11/16G06F11/20
CPCG06F11/1641G06F11/165G06F11/2025G06F11/2028
Inventor 吕浙帆王天成李华伟李晓维
Owner INST OF COMPUTING TECH CHINESE ACAD OF SCI
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