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FPGA system parameter backup method

A system parameter and backup technology, which is used in electrical digital data processing, redundancy in computing, data error detection, instrumentation, etc. Safety, avoidance of errors or lost effects

Pending Publication Date: 2022-05-13
西安开天电气可靠性实验室有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to provide a backup method for FPGA system parameters, which solves the problem in the prior art that the system cannot be started normally due to the failure of the periodic parameter update, causing the system to return to the factory settings or even the data is completely lost.

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Embodiment Construction

[0015] The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0016] The invention relates to a method for backing up FPGA system parameters. The configurable system parameters required by the system for power-off storage and power-on recovery are stored in a structure, and the structure also includes two parameters: the data length of the structure and the data inspection value. The backup method is as follows:

[0017] The mechanism bodies of the configurable system parameters of the power-down save and power-on recovery required by the system are respectively stored in two different areas on the eeprom. In this embodiment, these two areas are called A area ( That is, the first area) and B area (ie the second area), wherein the system parameter data is stored in the A area, and the system parameter backup data is stored in the B area.

[0018] like figure 1 As shown, after the system is started, rea...

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Abstract

The invention discloses an FPGA (Field Programmable Gate Array) system parameter backup method which comprises the following steps: firstly, system parameters are respectively stored in a first area and a second area on an eeprom, the first area is used as system parameter data, and the second area is used as system parameter backup data; after the system is started, data of the first area and the second area are read for verification, and normal work of the FPGA logic main function is guaranteed according to a verification result; in the system operation process, if a certain parameter in the system parameters changes, verification is carried out according to the rtc time of the current system, then the system parameter data of the first area is updated, and after the system parameter data of the first area is successfully updated, the system parameter backup data of the second area is erased and updated. The method can ensure that at least one of the two data is correct when the two data are erased, so that the system can be normally started and run. On the premise of ensuring that the system parameter data is correct, the backup parameters of the system parameters are erased, written and updated, and system data errors or loss is avoided.

Description

technical field [0001] The invention belongs to the field of FPGA logic design of automatic control, and relates to a method for backing up FPGA system parameters. Background technique [0002] When using FPGA to implement control system functions, it is often necessary to configure parameters, store parameters, update parameters, process parameters and other functions. Parameters are usually stored on eeprom. When the system is under high temperature, high humidity, unstable power supply, insufficient voltage load capacity, or insufficient battery power, the system will be repeatedly powered on and off, and the system may lose internal parameters and equipment operating status during the restart process, especially The process parameters change periodically. With uncontrollable power failure, the periodic parameters are updated to half or fail to update successfully, which will cause the system to return to the factory settings or even completely lose the data, making the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/14
CPCG06F11/1441
Inventor 陈嘉宁肖恩黄兆勋邓西川
Owner 西安开天电气可靠性实验室有限公司
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