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Semiconductor memory cell fabrication method

A technology of storage unit and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., and can solve the problems that the field oxide film endangers the isolation characteristics of devices, etc.

Inactive Publication Date: 2004-04-14
LG SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As a result, there is generally a disadvantage that the thinning of the field oxide film due to the increasing integration will jeopardize the device isolation characteristics

Method used

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  • Semiconductor memory cell fabrication method
  • Semiconductor memory cell fabrication method
  • Semiconductor memory cell fabrication method

Examples

Experimental program
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Embodiment Construction

[0027] A method of manufacturing a semiconductor memory cell of the present invention will now be described with reference to the accompanying drawings.

[0028] First, if Figure 3A As shown, a base oxide film 12 and a nitride film 13 are sequentially deposited on a semiconductor substrate 11 and patterned.

[0029] Such as Figure 3B As shown, using the patterned oxide film 12 and nitride film 13 as a mask, the field oxide film 14 is formed by using the LOCOS method, and then the patterned oxide film 12 and nitride film 13 are removed to expose the active region 13a , the field oxide film 14 has a beak portion adjacent to the active region.

[0030] see Figure 3C , implanted N into the semiconductor substrate 11 - ions to form a through-hole stop region 11a and a field stop region 11b inside the substrate 1, respectively. Then, the bird's beak portion 14a of the field oxide film 14 is removed by wet etching. Next, a gate oxide film 15 and gate polysilicon are deposite...

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PUM

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Abstract

A semiconductor memory element preparation method comprises that: a field oxide film with predetermined thickness is formed on a semiconductor substrate with an active region to cover the active region; partial field oxide film is taken out; at least one gate electrode is formed on the predetermined position of the active region; a first source region and a gate electrode region are formed on the first side of the substrate internal gate electrode; an interlayer dielectric film is formed on the substrate which contains a gate electrode; the interlayer dielectric film is etched to form a contact hole; a bit-line is formed on the required region of the substrate and in the contact hole; the interlayer dielectric film is etched to form a node contact hole to expose partial first source region and partial field region nearby the first source region; a node electrode is formed on the interlayer dielectric film and in the node contact hole which is connected to the interlayer dielectric film.

Description

technical field [0001] The present invention relates to a method of manufacturing a semiconductor unit, in particular to an improved method of manufacturing a semiconductor unit for growing a field oxide film to a certain thickness, eliminating part of the field oxide film with a certain thickness and overlapping it on an active region to get a sufficient active area in it. Background technique [0002] 1A to 1E are cross-sectional views for explaining successive manufacturing steps of a conventional semiconductor memory cell. [0003] Referring now to Figure 1A. On the semiconductor substrate 1 there is a well not shown. An oxide film 2 and a nitride film 3 are sequentially deposited in the well to define a field region and an active region in part of the substrate 1, and an active pattern is formed thereon by an etching process. [0004] As shown in FIG. 1B, using the active pattern as a mask, the semiconductor substrate 1 is oxidized to form a field oxide film 4, and t...

Claims

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Application Information

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IPC IPC(8): H01L21/762H01L21/8242H01L27/108
CPCH01L21/762H01L27/10873H01L27/10844H10B12/01H10B12/05H10B12/00
Inventor 高相基
Owner LG SEMICON CO LTD
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