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Integrated three-dimensional integrated system-in-package structure and packaging method thereof

A system-level packaging and three-dimensional integration technology, which is applied in the manufacture of semiconductor devices, electrical solid-state devices, semiconductor/solid-state devices, etc., can solve the problems of limiting integration density and performance, difficulty in adapting to the needs of electronic equipment engineering, etc., and achieve simple structure and integrated Increased speed and fewer assembly steps

Pending Publication Date: 2022-06-24
NO 54 INST OF CHINA ELECTRONICS SCI & TECH GRP
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Problems solved by technology

Most of the existing system-in-packages are planar packages based on organic substrates and multilayer ceramic substrates. Even double-sided integration needs to be equipped with hermetic packaging structures, which limits the integration density and performance in terms of integration methods.
It is difficult to adapt to the engineering needs of electronic equipment system-in-package

Method used

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  • Integrated three-dimensional integrated system-in-package structure and packaging method thereof
  • Integrated three-dimensional integrated system-in-package structure and packaging method thereof
  • Integrated three-dimensional integrated system-in-package structure and packaging method thereof

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Embodiment Construction

[0026] The present invention will be further described below in conjunction with the accompanying drawings.

[0027] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific examples described herein are only used to illustrate the present invention, but not to limit the present invention. An integrated three-dimensional integrated system-level packaging structure and packaging method of the present invention will be described in detail below with reference to specific structures and principles.

[0028] An integrated three-dimensional integrated system-level packaging structure includes a ceramic substrate, an airtight enclosure, a cover plate and a BGA ball; the ceramic substrate is divided into upper and lower layers, and a microcavity for bonding chips is opened on...

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Abstract

The invention provides an integrated three-dimensional integrated system-in-package architecture and a packaging method thereof, and belongs to the technical field of system-in-package. The chip packaging structure comprises a ceramic substrate, a closed enclosure frame, a cover plate and BGA solder balls, the ceramic substrate is divided into an upper layer and a lower layer, a microcavity for bonding a chip is formed in the substrate, the closed enclosure frame is welded to the lower layer of the ceramic substrate, the cover plate is welded to the closed enclosure frame, BGA pads are arranged below the ceramic substrate, the BGA solder balls are welded to the lower layer of the ceramic substrate through the BGA pads, and the BGA solder balls are welded to the lower layer of the ceramic substrate through the BGA pads. The upper ceramic substrate and the lower ceramic substrate are interconnected and welded through the BGA balls welded on the upper ceramic substrate. The invention further provides a packaging method of the integrated architecture. The internal integration density is nearly doubled, the volume occupancy rate of external interconnection interfaces and airtight packaging is greatly reduced, meanwhile, the structure is simple, the number of assembly steps is small, and an effective mode for achieving integrated three-dimensional integrated system-level packaging is achieved.

Description

technical field [0001] The invention belongs to the technical field of system-level packaging, in particular to an integrated three-dimensional integrated system-level packaging structure and a packaging method. Background technique [0002] With the engineering needs of short, small, light, thin and miniaturized military electronic equipment, system-in-package is developing in the direction of high density, high performance and high reliability. Existing system-in-packages are mostly flat packaging forms based on organic substrates and multi-layer ceramic substrates. Even double-sided integration needs to be equipped with a hermetic packaging structure, which limits the integration density and performance from the integration method. It is difficult to meet the engineering needs of electronic equipment system-in-package. SUMMARY OF THE INVENTION [0003] In view of this, the present invention provides an integrated three-dimensional integrated system-level packaging stru...

Claims

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Application Information

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IPC IPC(8): H01L23/053H01L23/13H01L23/10H01L21/50H01L21/52
CPCH01L23/053H01L23/13H01L23/10H01L21/50H01L21/52
Inventor 尹学全韩威魏浩梁栋杨宗亮
Owner NO 54 INST OF CHINA ELECTRONICS SCI & TECH GRP
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