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Board-level system-level packaging method and packaging structure

A system-level packaging and board-level technology, which is applied to TV system components, manufacturing microstructure devices, and processing microstructure devices, to achieve the effects of preventing lateral overflow, improving bonding strength, and high efficiency

Inactive Publication Date: 2022-07-29
NINGBO SEMICON INT CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the existing system-in-package process still has great challenges

Method used

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  • Board-level system-level packaging method and packaging structure
  • Board-level system-level packaging method and packaging structure
  • Board-level system-level packaging method and packaging structure

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Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0016] It can be known from the background art that the existing system-in-package method still has great challenges.

[0017] Specifically, taking flip-chip as an example, the existing system-level packaging method has the following disadvantages: 1. The process is complicated, resulting in low packaging efficiency; 2. Each chip needs to be soldered on the solder balls in sequence, and the packaging efficiency is low; 3. . It is necessary to use the welding process to realize the electrical connection between the chip and the circuit board, which is not compatible with the process in the front part of the packaging; 4. When a large pressure is accidentally applied during the process of dipping the flux, it is easy to cause the circuit board to crack.

[0018] In order to solve the technical problem, a circuit board is provided. As a carrier board, the circuit board includes a first bonding surface; a cavity is formed on the first bonding surface of the circuit board, and a plu...

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Abstract

According to the board-level system-level packaging method and the packaging structure, in the board-level system-level packaging method, a circuit board serves as a carrier board, and bonding of a plurality of first chips in a first device wafer and the circuit board is achieved through bonding of a first bonding surface of the first device wafer and a second bonding surface of the circuit board; the bonding layer covers the cavity and exposes the first welding pad and the second welding pad, so that the first welding pad of the circuit board and the second welding pad of the first chip are oppositely arranged to define a first gap, and the cavity is used for forming a functional cavity of the first chip. The process cost is reduced, the process efficiency is improved, and industrial batch production is facilitated.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a board-level system-level packaging method and a packaging structure. Background technique [0002] System-in-package uses any combination to combine multiple active components / devices, passive components / devices, MEMS devices, discrete KGD (Known Good Die, known good chips) with different functions and prepared by different processes, such as optoelectronic chips , biochips, etc., are integrated and assembled in three dimensions (X direction, Y direction and Z direction) into a single standard package with a multi-layer device structure and can provide multiple functions to form a system or subsystem. [0003] Flip-chip (FC, Flip-Chip) soldering is a commonly used system-in-package method at present. The system-in-package method includes: providing a PCB circuit board, wherein solder balls arranged according to certain requirements are formed on the PCB circuit board (formed by a...

Claims

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Application Information

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IPC IPC(8): H01L21/60H01L21/78B81B7/00B81B7/02B81C1/00B81C3/00H05K1/18H05K3/34
CPCH01L24/83H01L24/81H01L24/11H01L24/97H01L24/32B81C1/00095B81C1/00261B81C3/001B81B7/02B81B7/0032B81B7/0006B81C1/00888H05K1/181H05K3/3436H01L2224/32238H01L2224/11462H05K2201/037H01L2224/81H01L2224/16225H01L2924/181H01L2924/00012
Inventor 黄河向阳辉刘孟彬
Owner NINGBO SEMICON INT CORP