Method and apparatus for minimizing dopant outdiffusion in gate structure

Abstract

A method for controlling dopant outdiffusion within an integrated circuit is disclosed. The method includes providing a substrate, forming a gate oxide layer over a substrate, and forming a layered silicon structure over the gate oxide layer. The layered silicon structure is capable of preventing dopant outdiffusion and a silicide layer is formed atop the layered silicon structure. Also disclosed is a gate structure to reduce dopant diffusion.

Description

technical field [0001] The present invention relates to methods and apparatus for fabricating gates for integrated circuits. More particularly, the present invention relates to methods and apparatus for minimizing dopant outdiffusion in gate structures when processing gate structures. The present invention also relates to gate structures that reduce outdiffusion of dopants. Background technique [0002] With the demand for integrated circuits, such as dynamic random access memory DRAM integrated circuits, the need to efficiently produce integrated circuits continues to increase. During the production of integrated circuits, the integration degree of the integrated process must be maintained throughout the process, which can increase the overall output of integrated circuits. [0003] When forming a gate structure (such as a gate layer interconnection), dopants in the silicon layer of the gate structure can diffuse vertically into the silicide layer of the gate structure du...

AI Technical Summary

Problems solved by technology

Also, for DRAM, reducing the amount of recoverable dislocations, it significantly damages (reduces) DRAM retention time due to increased device leakage

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