Clock circuit, GSM phone and method of reducing electromagnetic interference
A technology of electromagnetic interference and clock signal, applied in the direction of reducing electrical interference, reducing interference caused by sinusoidal oscillation, electrical components, etc., can solve problems such as expensive and complex solutions, and achieve economical area and power, simple area and power Effect
Inactive Publication Date: 2005-08-10
NXP BV
View PDF9 Cites 1 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
The solutions described in these patents, as well as other prior art solutions, are often complex and expensive, often using circuits such as wireless stages or oscillators
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0026] best practice
[0027] The present invention provides a method and apparatus for switching to use either the system clock or a slightly delayed system clock as the master clock for a circuit. The delay must not be large, since the very high frequency (and thus higher order) harmonics of the system clock are primarily of concern. As an example, a 35Ops delay on a 13MHz clock reduces the harmonics by 10dBm. This allows the noise emitted by the power supply to the board leads to have a "smoothing filter" spectrum in these high frequencies, thus reducing frequencies that may occur eg in wireless channels.
[0028] figure 1A GSM phone 10 according to one embodiment of the invention is shown. This embodiment of a GSM phone is provided by way of example only. In the case of GSM phones, in one embodiment (eg, in Europe and other regions), the clock signal is at 13MHz and the interference to be reduced is in the 900MHz range (eg, 936 and 949MHz). The term "GSM" as used here...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
A method of producing a clock signal with reduced electromagnetic interference spectral components includes providing a first clock signal; producing a second clock signal by delaying the first clock signal; and generating a jittered clock signal by switching between the first clock signal and the second clock signal at times selected responsive to a random number generator. A GSM phone comprises a clock configured to produce a first clock signal; a delay element coupled to the clock to produce a second clock signal by delaying the first clock signal; a multiplexer coupled to the clock and to the delay element to select between the clock and the delay element; a random number generator coupled to the multiplexer wherein the multiplexer generates a jittered clock signal by switching between the first clock signal and the second clock signal responsive to the random number generator; and a plurality of GSM phone components respectively coupled to the multiplexer to use the jittered clock signal as an input clock for the component.
Description
technical field [0001] The present invention relates to methods and apparatus for reducing electromagnetic interference emitted by electrical circuits. More specifically, the present invention relates to methods and apparatus for reducing electromagnetic interference emitted by clock circuits. Background technique [0002] Many devices have logic integrated circuits that use high-frequency clocks that, combined with high-frequency harmonics, can create electromagnetic interference in other integrated circuits. The clock can also cause electromagnetic interference through the antenna to wireless circuits or other circuits that are not necessarily integrated circuits. This clock is shared by other system elements including circuits external to the integrated circuit that has the clock. An integrated circuit with logic operating at such a frequency will generate many high frequency harmonics of the fundamental clock frequency on its power supply leads and output signals. The...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/04H03K3/00H03K3/84H04B15/02H04B15/04
CPCH04B15/06H04B2215/067G06F1/04H04B1/10
Inventor R·布陶德B·吉尼蒂
Owner NXP BV