Semiconductor device
A semiconductor and device technology, applied in the field of vertical power semiconductor devices, can solve problems such as hindering electron injection efficiency, IGBT turn-on voltage cannot be reduced, etc., and achieve the effects of improving electrical isolation effect, increasing breakdown voltage, and stabilizing breakdown voltage
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Embodiment 1
[0165] 1 to 3, this embodiment shows an example including a pin diode. The pin diode includes a second conductivity type p + Anode (collector) region 1, an n-type buffer zone 3, a n-type semiconductor substrate of the first conductivity type with low impurity concentration - Region 5, a first conductivity type n formed on the first main surface + Cathode area (n + emitter region) 7, insulating films 11 and 15, a gate electrode layer 13 as a control electrode layer, a cathode electrode 17 as a first electrode layer, and an anode electrode 19 as a second electrode layer.
[0166] Form groove 9 on the first main surface of having done cathode region 7, it passes n + After the cathode region 7 reaches the substrate n - District 5.
[0167] As shown in FIG. 1, the groove 9 has a planar shape approximately enclosing a rectangle, and within the rectangle there are several portions extending parallel to each other.
[0168] no + The cathode region is formed entirely on the firs...
Embodiment 2
[0197] refer to Figures 11 to 13 , compared with the semiconductor device according to Embodiment 1, the semiconductor device of this embodiment is different in having a p + The impurity region 23 is isolated.
[0198] p + isolation impurity region 23 in the n - Formed on the surface of the region 5, a planar region surrounding the diode forming region, and in contact with the trench 9. In addition, p + The isolation impurity region 23 is made deeper than the trench 9 .
[0199] Except for this point, this embodiment is the same as Embodiment 1. Therefore, corresponding parts are labeled with the same characters, and their descriptions will not be repeated.
[0200] A method of manufacturing the semiconductor device according to the present embodiment will be described below.
[0201] The method of manufacturing the semiconductor device according to the present embodiment first includes the same steps as in Embodiment 1 shown in FIG. 4 . Next, refer to Figure 14 , b...
Embodiment 3
[0208] refer to Figures 17 to 19 , the semiconductor device of this embodiment is different from the semiconductor device of Embodiment 1 in that it has a p + High concentration region 31 (hereinafter referred to as p + contact area)
[0209] p + Contact region 31 is formed in the diode forming region of the first main surface across trenches 9b and 9c and n + The cathode regions are adjacent. p + The contact region 31 is formed on the surface area sandwiched between the trenches 9b and 9c extending parallel to each other, as Figure 18 shown. p + The contact region 31 is electrically connected to the cathode electrode 17 . p + The surface impurity concentration of the contact region 31 is at least 1×1017 cm -3 . p + Contact area 31 and n + The cathode regions 7 are alternately arranged with grooves in between. The number of grooves 9a and 9b... can be selected arbitrarily.
[0210] Except for this point, this embodiment is almost the same as Embodiment 1. Acc...
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