Method for mfg. static random memory

Abstract

A process for preparing static RAM includes defining a substrate, on which grid oxide layer and the first conductor layer have been formed, for generating embedded contact window, opening, generating the second conductor layer, generating an embedded contact window in the substrate relative to its opening, generating protecting layer, filling the recesses, removing part of protecting layer, generating patterned photoresist layer, etching to form a grid and internal connection, removing the photoresist layer, and implanting to form source / drain.

Description

technical field [0001] The present invention relates to a manufacturing method of a random access memory (Random Access Memory, RAM), and in particular to a manufacturing method of a static random access memory (Static Random Access Memory, SRAM). Background technique [0002] Random access memory is a kind of volatile memory, in which static random access memory stores data in the conductive state of transistors in memory cells, static random access memory has high-speed operation, low power consumption and simple operation Features, so it has the advantages of easy design and no need to update the accessed data frequently. Generally, in the SRAM, the contact windows connecting the gate and the interconnection layer are mostly buried contact windows. [0003] Figure 1A to Figure 1D It is a schematic cross-sectional view of a manufacturing process of a known static random access memory. [0004] Please refer to Figure 1A , defining a gate oxide layer 102 and a first pol...

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Problems solved by technology

[0008] However, in the above-mentioned known method, when performing the etching step of the gate 116 and the interconnection layer 118, by Figure 1C It can be seen that because the thickness of the polysilicon layer in the region 120 is different from that in the region 122, when the first polysilicon layer 108 in the region 120 is completely etched away, at least part of the second polysilicon layer 104 in the region 122 will still be untouched. etch away, so when the second polysilicon layer 104 is removed by further etching, it will cause Figure 1D As shown in the trench 124, when the depth of the trench 124 in the substrate 100 exceeds the depth of the buried contact window 112, the buried contact window 112 will be cut off, resulting in the subsequent formation of the source / drain of the device and the buried contact. Window 112 has broken circuit

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