Method for fabricating strained crystalline layer on insulator, semiconductor structure and obtained semiconductor structure
A technology of insulator layer and strain crystallization, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve the problem of strain increase of unstrainable silicon layers, etc.
Active Publication Date: 2006-11-01
SOITEC SA
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[0004] A disadvantage of the structure of the above approach is that the strain of the strained silicon layer on the SiGe layer cannot be increased to commercially significant values
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[0055] figure 1 A schematic diagram showing a semiconductor substrate used in the first step of the method according to the first embodiment of the present invention. The semiconductor substrate 1 is a single crystal germanium wafer, which preferably has generally available dimensions and electronic properties. A germanium wafer or feedstock wafer 1 has a polished and cleaned upper surface 11 .
[0056] In another embodiment of the present invention, the semiconductor raw substrate may be an A(III)-B(V) semiconductor wafer such as a GaAs wafer, which has an epitaxial Ge layer or an epitaxial A(III) layer such as a GaAs layer. - B(V) semiconductor layer. For example, the substrate may contain a GaAs layer or a GaAs wafer covered by a Ge layer.
[0057] figure 2 A schematic diagram showing the first step of the first embodiment of the present invention. In the first step, the figure 1A first crystalline epitaxial layer 2 is grown on a semiconductor raw material substrate ...
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Abstract
PURPOSE: A method for fabricating a strained crystal layer on an insulator is provided to easily grow a strained silicon layer on an insulator and facilitate an SOI(silicon on insulator) structure by increasing the content of germanium without a danger of forming a high dislocation density in a SiGe layer. CONSTITUTION: A semiconductor donor substrate is prepared which includes germanium and / or A(III)-B(V) semiconductor. At least one of the first crystalline epitaxial layer is prepared. At least one insulator layer(3) is prepared. The first crystalline epitaxial layer is split. At least one of the second epitaxial layer(9) is formed on the split first layer. While the first crystalline epitaxial layer is prepared, the content of the germanium of a buffer layer of the first layer and / or the content of the A(III)-B(V) semiconductor decreases. While the insulator layer is prepared, the first crystalline epitaxial layer is formed between the substrate and the insulator layer.
Description
technical field [0001] The invention relates to a method for manufacturing a strained crystal layer on an insulator, a semiconductor structure for manufacturing a strained crystal layer on an insulator, and a semiconductor structure manufactured using the same. Background technique [0002] Thin strained semiconductor layers such as silicon layers have favorable electron and hole mobility properties. Therefore, such layers are very important for almost all areas of microelectronics, because they can be used to obtain high-performance devices with high speed and low power consumption. If the strained semiconductor layer is transferred onto the insulator layer to obtain a structure such as SOI (silicon-on-insulator), the strained semiconductor layer can be used more effectively, in microelectronics and microscopic Their superiority is generally known in the field of mechanics. [0003] At the 2001 IEEE International SOI Conference, Cheng et al. disclosed a method of manufact...
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IPC IPC(8): H01L21/00H01L21/20H01L21/84H01L21/02H01L21/762H01L27/12
CPCH01L21/76254H01L21/76259
Inventor 塞西尔·奥尔奈特卡洛斯·马祖拉
Owner SOITEC SA