Flash memory unit, flash memory unit array and mfg. method thereof

Abstract

The present invention discloses a flash memory storage unit, flash memory storage unit array and its making method. Said flash memory storage unit array consists of substrate, series-connected several storage unit structures and source region / drain region. Every storage unit structure is formed from stack gate structure consisting of selection gate dielectric layer, selection gate and top cover layer; gap wall placed on the side wall of selection gate; control gate which is placed on one side of the stack gate structure and is connected with stack gate structure; floating gate placed between control gate and substrate; intergate dielectric layer placed between the control gate and floating gate; tunneling dielectric layer placed between floating gate and substrate and control gate and source region / drain region respectively placed in the most external side of storage unit array and substrate of one side of stack gate structure.

Description

technical field [0001] The present invention relates to a semiconductor device, and in particular to a flash memory unit and a manufacturing method thereof. Background technique [0002] Flash memory elements have the advantages of being able to store, read, and erase data multiple times, and the stored data will not disappear after power failure, so it has become a widely used device in personal computers and electronic devices. A non-volatile memory element. [0003] A typical flash memory device uses doped polysilicon to make a floating gate (Floating Gate) and a control gate (Control Gate). Moreover, the floating gate is separated from the control gate by a dielectric layer, and the floating gate is separated from the substrate by a tunnel oxide layer (Tunnel Oxide). When performing write / erase (Write / Erase) data operations on the flash memory, by applying a bias voltage to the control gate and source / drain regions, electrons are injected into the floating gate or elec...

AI Technical Summary

Problems solved by technology

However, the program of writing and reading the memory cells in the NAND array is relatively complicated, and because many memory cells are connected in series in the array, the read current of the memory cells is relatively small, and the A problem that causes the operation speed of the memory cell to slow down, and the performance of the device cannot be improved

Images