High-speed large-capacity data collecting system based on CPLD and SDRAM
A data acquisition system and large-capacity technology, applied in the direction of electrical digital data processing, input/output process of data processing, instruments, etc., can solve the problem that the static memory cannot meet the storage capacity requirements, etc.
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[0005] This embodiment is described in conjunction with Fig. 1, Fig. 2, Fig. 3, and this embodiment is by matching input network circuit 1, amplifying buffer circuit 2, analog / digital conversion circuit 3, CPLD control unit circuit 4, interface circuit 5, SDRAM storage unit circuit 6 components; the analog signal is input to the signal input end of the matching input network circuit 1, the signal output end of the matching input network circuit 1 is connected to the signal input end of the amplification buffer circuit 2, and the signal output end of the amplification buffer circuit 2 is connected to the analog / digital conversion circuit The analog signal input end of 3, the data output end of analog / digital conversion circuit 3 is connected to the data input end of CPLD control unit circuit 4, the clock signal input end of analog / digital conversion circuit 3 is connected to the clock signal output end of CPLD control unit circuit 4 The data output terminal of the CPLD control u...
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