Method and system for polishing semiconductor wafers

A semiconductor and crystal technology, applied in the field of semiconductor processing, can solve the problems of limited number of polishing pad polishing cycles, time-consuming processing, uncertainty in the number of test wafers, etc.
CN1340210AInactive Publication Date: 2002-03-13NXP BV

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
NXP BV
Publication Date
2002-03-13
Estimated Expiration
Not applicable · inactive patent

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Abstract

A method for optimizing CMP (chemical mechanical polishing) processing of semiconductor wafers on a CMP machine. The optimization method includes the steps of polishing a test series of semiconductor wafers on a CMP machine. During the CMP processing, a film thickness is measured at a first point proximate to the center of each respective wafer using a film thickness detector coupled to the machine. A film thickness at a second point proximate to the outside edge of the respective wafers is also measured. Based upon the in-process film thickness measurements at the first point and the second points, the optimization process determines a polishing profile describing a removal rate and a removal uniformity with respect to a set of process variables. The process variables include different CMP machine settings for the polishing process, such as the amount of down force applied to the wafer. The polishing profile is subsequently used to polish production wafers accordingly. For each production wafer, their respective removal rate and removal uniformity is determined by measuring a film thickness at the center of each production wafer and a film thickness at the outside edge of each production wafer using the film thickness detector. Based upon these measurements, the set of process variables is adjusted in accordance the removal rate and the removal uniformity measurements to optimize the CMP process for the production wafer as each respective wafer is being polished.
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Description

technical field

[0001] The technical field of the invention is semiconductor processing. The present invention relates to methods and systems for optimizing chemical mechanical processing of semiconductor wafers. In particular, the present invention relates to a method and a system for in situ optimization of polishing processes in chemical mechanical polishing (CMP) equipment to improve process efficiency. Background of the invention

[0002] Much of the power and efficiency of today's digital integrated circuit devices is due to increased levels of integration. More and more components (resistors, diodes, transistors, and the like) are continually being integrated into the underlying chip or integrated circuit. The starting material of a typical integrated circuit is silicon. The material is gradually developed into a single wafer. Takes the shape of a solid cylinder. The wafer is then sawed (similar to a loaf of bread) to produce a typical wafer with a diameter of 10...

Claims

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