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Bipolar heterojunction transistor and semiconductor IC device of the transistors

一种异质结双极型、集成电路的技术，应用在半导体器件、半导体/固态器件制造、电路等方向，能够解决集电极电流—电压增长特性退化等问题

Inactive Publication Date: 2003-07-30
RENESAS ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

As a result, there is also a problem that the collector current-voltage growth characteristic degrades

Method used

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  • Bipolar heterojunction transistor and semiconductor IC device of the transistors
  • Bipolar heterojunction transistor and semiconductor IC device of the transistors
  • Bipolar heterojunction transistor and semiconductor IC device of the transistors

Examples

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no. 1 example

[0054] Figure 5 The layered structure of the npn-type heterojunction bipolar transistor 50 of the first embodiment is shown.

[0055] like Figure 5 As shown, transistor 50 includes: a semi-insulating GaAs substrate 3; an n+-type GaAs sub-collector layer 4 (500 nm thick) formed on substrate 3; and an n-type InGasP collector layer 9 (100 nm thick) , which is formed on layer 4. The surface of the sub-collector 4 is partially exposed from the overlying collector layer 9 . The collector electrode 31 is formed on the exposed portion of the layer 4 .

[0056] Using silicon as the n-type dopant, at 4.0 × 10 18 The n+-type GaAs sub-collector layer 4 is doped with a doping concentration per cubic centimeter. The N-type InGaP collector layer 9 has In of 0.48 (ie, X In ), it is therefore expressed as In 0.48 Ga 0.52 P. However, this In composition is higher than that of X In Can be a value in the range 0.48-0.5. The n+-type InGaP collector layer 9 uses Si as the n-type dopant, ...

no. 2 example

[0089] Figure 11 The npn-type heterojunction bipolar transistor 50A of the second embodiment is shown.

[0090] according to Figure 5 The above-described heterojunction bipolar transistor 50 of the first embodiment generates a high electric field portion in the n+ type InGaP collector layer 9 . However, if the doping concentration of the n+-type GaAs sub-collector layer 4 is insufficient, the depletion layers formed in the collector region (ie in the collector layers 7 , 8 and 9 ) will extend into the sub-collector layer 4 . At this time, a high electric field will be generated in the depleted portion of layer 4 . Therefore, in order to ensure that the advantages of the present invention can be obtained, it is preferable to add a semiconductor layer having a wider energy band gap than the collector layer 7 on the side surface of the sub-collector layer 4 adjacent to the collector layer 9 . The transistor 50A of the second embodiment includes such a wide band gap semiconduc...

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Abstract

A heterojunction bipolar transistor has a raised breakdown voltage and restrains the rising characteristic of IC-VCE characteristic from degrading. The collector region includes first, second, and third collector layers of semiconductor. The first collector layer is made of a doped or undoped semiconductor in such a way as to contact the sub-collector region. The second collector layer is made of a doped or undoped semiconductor having a narrower band gap than the first collector layer in such a way as to contact the base region. The third collector layer has a higher doping concentration than the second collector layer in such a way as to be located between or sandwiched by the first collector layer and the second collector layer.

Description

technical field [0001] The present invention relates generally to heterojunction semiconductor devices, and in particular to a heterojunction bipolar transistor with improved breakdown voltage and a semiconductor integrated circuit device using the same. Background technique [0002] In order to increase the collector-to-emitter breakdown voltage of a heterojunction bipolar transistor in use, it is important to suppress or prevent avalanche breakdown in the collector region. For this reason, an improved structure has been disclosed in which a semiconductor layer having a low impact ionization coefficient is inserted into a high electric field portion of the collector region. For example, such a structure is disclosed in Japanese Unexamined Patent Publication No. 7-16172 of 1995. [0003] FIG. 1 is a schematic diagram of energy bands of a heterojunction bipolar transistor in the prior art, in which a semiconductor layer with a low impact ionization coefficient is not inserte...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/331H01L29/08H01L29/737
CPCH01L29/7371H01L29/0821H01L29/737
Inventor 丹羽隆树岛胁秀德东晃司黑泽直人
Owner RENESAS ELECTRONICS CORP
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