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Substrate for face down bonding

A technology of flip-chip soldering and substrates, which is applied in the direction of electrical components, electrical solid devices, circuits, etc., and can solve problems such as rising prices, increasing processes, and decreasing reliability of solder joints

Inactive Publication Date: 2004-07-14
ASE ASSEMBLY & TEST SHANGHAI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] The disadvantage of this flip-chip bonding is that due to the different thermal expansion coefficients of the chip 130 and the organic substrate layer 100, the reliability of the solder joints decreases due to thermal mismatch during the manufacturing process and operation of the device.
But the disadvantage of this form is that it increases the process and leads to an increase in price.

Method used

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  • Substrate for face down bonding
  • Substrate for face down bonding
  • Substrate for face down bonding

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Embodiment Construction

[0030] As shown in FIG. 5 , like the conventional structure, there are multiple pads 301 on the substrate layer 300 , and a solder resist layer 303 is provided around each pad 301 . The improvement of the present invention is that the central area of ​​the pad 301 is removed to form a ring-shaped pad structure, and a hollow area 302 is formed in the center of the pad. Figure 5A and Figure 5B Its cross-sectional view is shown in . Since the hollow area 302 makes the surface of the pad 301 uneven, therefore, during the soldering process between the chip pad 231 and the pad 301, due to the uneven contact surface between the two, the filler (such as Figure 5B Shown), play the same effect as the improvement in Figure 4.

[0031] Figure 6 shows several pad shapes that can be used with a hollow area in the center of the pad. However, it should be understood that what is shown in FIG. 6 is only an example, not an exhaustive one. Therefore, pads of other shapes in other hollow ar...

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Abstract

This invention provides a baseplate used in flip-chip bonding including a substrate layer, a weld disk on it and a surrounded welding stop layer, the center of the disk is removed to form a hollow zone, enabling the contact face of the disk uneven which can exclude fillers to realize reliable contact between weld spots and the disks in the process of welding.

Description

technical field [0001] The invention relates to integrated circuit packaging technology, in particular to a substrate used in chip flip-chip welding technology. Background technique [0002] The flip chip (Flip Chip) process is an advanced packaging technology used to replace the commonly used wire bonding (wire bonding) process for chip and external electrical interconnection. Its advantage lies in its good electrical performance, which is suitable for the application of high-speed and high-density electronic devices. Figure 1 shows the flow chart of this flip chip technology. [0003] As shown in Figure 1, the general flow of the flip chip technology is: [0004] On the side of the substrate layer 100 to the pad 101, the flux is dripped through the drip nozzle 110 to form a flux layer 120 on the surface of the substrate layer 100; (as shown in Figure 1A) [0005] Then, the chip 130 to be packaged is turned upside down on the substrate layer 100, so that the solder joint...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/12H01L23/48
CPCH01L2924/01033H01L2224/81385H01L2924/01082H01L2924/0105H01L24/16H01L24/81H01L2924/014H01L2224/8185H01L2224/16H01L2924/14
Inventor 杜黎光
Owner ASE ASSEMBLY & TEST SHANGHAI