Pseudo-static DASD and its data refresh method

A memory access, pseudo-static random technology, applied in static memory, digital memory information, information storage, etc., can solve problems such as read, write and refresh action conflicts

Active Publication Date: 2005-06-08
ELITE SEMICON MEMORY TECH INC
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  • Summary
  • Abstract
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  • Claims
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AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a pseudo-static random access memory and its data refresh method to solve the problem of conflict between read, write and refresh actions, and to effectively reduce power consumption

Method used

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  • Pseudo-static DASD and its data refresh method
  • Pseudo-static DASD and its data refresh method
  • Pseudo-static DASD and its data refresh method

Examples

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Embodiment Construction

[0014] The principle of the present invention is to prolong the opening time of the word line according to the cycle of the refresh signal, thereby avoiding the conflict of reading, writing and refreshing, and reducing power consumption. The following will illustrate through several embodiments.

[0015] Generally speaking, 4Kb of data needs to be refreshed within 64 milliseconds (ms), so the refresh interval of each kb of data is about 16 microseconds (ms), that is, the cycle of the refresh signal is about 16ms / time. The following is an example in which the refresh interval is 16ms.

[0016] figure 2 The case where the interval of the example address N is less than 8ms. When address N-1 in an address string is converted to address N, an address conversion signal ATD is converted to a high level, and then the word line of N-1 is turned off, because the refresh signal REFQ is low , so no word lines are turned on. Afterwards, when ATD returns to a low level, the N address w...

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Abstract

The invention relates to a data refresh method of the pseudo-static RAM. Firstly, one address in serial and one refresh signal are supplied. The address serial is used as the reference of the data read-write position. Secondly, one word line opening time of the pseudo-static RAM whose longest time is one half of the period of the refresh signal is set at not less than one address of the address serial. Finally, the refresh is made at the word line closing time, and the read and write are made at word line opening time of the address. If the word line is closed while doing write in, the write in action is delayed to the next ATD signal high level.

Description

technical field [0001] The invention relates to a pseudo static random access memory (Pseudo Static Random Access Memory, PSRAM) and a data refresh method thereof. Background technique [0002] Pseudo-static random access memory is to implement the function of SRAM under the hardware structure of dynamic random access memory (Dynamic Random Access Memory, DRAM). Under the traditional DRAM structure, it is not allowed to turn on two word lines at the same time. In addition to reading and writing, DRAM must perform refresh actions at regular intervals to avoid losing data therein. However, the refreshing action is equivalent to turning on another word line, so the times of reading, writing and refreshing need to be staggered to avoid the conflict of turning on two word lines at the same time. [0003] refer to figure 1 , DRAM read, write and refresh are implemented according to an address transition detection (address transition detection) signal ATD. When the address is c...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/406
Inventor 黄沛杰张健怡
Owner ELITE SEMICON MEMORY TECH INC
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