Digital signal processor subsystem and data processing method thereof

Abstract

The invention discloses a digital signal processor subsystem connected between the host computer and the digital signal processor. It includes the inputting buffer module to store the inputting data and control the data sending; the outputting buffer module to store the output data and control the data sending; the interrupting controller to send the interrupt request signal; the register collocation module to allocate the parameter. The invention also discloses a data processing method. The data is stored in the inputting buffer memory when the host computer transfers the data to the processor, the processor controlled by the interrupting signal reads the data from the inputting buffer memory; the data is stored in the outputting buffer memory when the processor sends the data to the host computer, when the output buffer memory reaches a setting state, the memory controller will inform the host computer to read the data. The invention can control the depth of the buffer memory module flexibly, so it can use the hard ware resource fully and the other it can control the processing speed of data.

Description

technical field [0001] The invention relates to digital signal processing technology, in particular to a digital signal processor subsystem and a data processing method thereof. Background technique [0002] Digital Signal Processor (DSP) has the characteristics of powerful computing capability and flexible programmability, and is widely used in the field of digital audio. Especially in mobile phone applications, if the call environment is too noisy, in order to obtain a clear call effect, it is necessary to use a digital signal processor to remove background noise. For example: Generally, during a call, the voice will fluctuate from time to time. At this time, it is necessary to use a digital signal processor to automatically adjust the strength of the voice signal; or use a digital signal processor to realize voice modulation processing and so on. [0003] An existing digital signal processing system for voice modulation, its structure is as follows figure 1 As shown, th...

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Problems solved by technology

[0004] But when figure 1 In the system shown, since the interface (multi-channel buffer) between the core module and the external host only realizes the caching effect on the data, and no control module is set between the two, it cannot flexibly control the data in the input and output buffer area. Interaction of the data flow with the core module

At the same time, the core module and the external host cannot change the

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